AT91SAM7S32B-AU Atmel, AT91SAM7S32B-AU Datasheet - Page 516

IC MCU ARM7 32KB FLASH 48LQFP

AT91SAM7S32B-AU

Manufacturer Part Number
AT91SAM7S32B-AU
Description
IC MCU ARM7 32KB FLASH 48LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7S32B-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Cpu Family
91S
Device Core
ARM7TDMI
Device Core Size
32b
Frequency (max)
55MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
8KB
# I/os (max)
21
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Package
48LQFP
Family Name
AT91
Maximum Speed
55 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
21
Number Of Timers
3
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Price
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Manufacturer:
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35.6
WARNING: The UDP peripheral clock in the Power Management Controller (PMC) must be enabled before any read/write
operations to the UDP registers including the UDP_TXCV register.
Table 35-4.
Notes:
516
Offset
0x000
0x004
0x008
0x00C
0x010
0x014
0x018
0x01C
0x020
0x024
0x028
0x02C
0x030 + 0x4 * (ept_num - 1)
0x050 + 0x4 * (ept_num - 1)
0x070
0x074
0x078 - 0xFC
USB Device Port (UDP) User Interface
1. Reset values are not defined for UDP_ISR.
2. See Warning above the
AT91SAM7S Series Preliminary
Register Mapping
Register
Frame Number Register
Global State Register
Function Address Register
Reserved
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Interrupt Status Register
Interrupt Clear Register
Reserved
Reset Endpoint Register
Reserved
Endpoint Control and Status Register
Endpoint FIFO Data Register
Reserved
Transceiver Control Register
Reserved
”Register Mapping”
on this page.
Name
UDP_FRM_NUM
UDP_GLB_STAT
UDP_FADDR
UDP_IER
UDP_IDR
UDP_IMR
UDP_ISR
UDP_ICR
UDP_RST_EP
UDP_CSR
UDP_FDR
UDP_TXVC
(2)
Access
Read-only
Read-write
Read-write
Write-only
Write-only
Read-only
Read-only
Write-only
Read-write
Read-write
Read-write
Read-write
6175K–ATARM–30-Aug-10
Reset
0x0000_0000
0x0000_0000
0x0000_0100
0x0000_1200
0x0000_0000
0x0000_0000
0x0000_0000
(1)

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