DSPIC33FJ128MC202-I/MM Microchip Technology, DSPIC33FJ128MC202-I/MM Datasheet - Page 220

• Manufacturer Part Number: DSPIC33FJ128MC202-I/MM
• Description: IC DSPIC MCU/DSP 128K 28-QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC202-I/MM

• Program Memory Type: FLASH
• Program Memory Size: 128KB (128K x 8)
• Package / Case: 28-QFN
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
REGISTER 16-10: PxOVDCON: OVERRIDE CONTROL REGISTER
DS70291E-page 220
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13-8
bit 7-6
bit 5-0
Note 1:
U-0
U-0
—
—
PWM2 supports only one PWM I/O pin pair.
Unimplemented: Read as ‘0’
POVDxH<3:1>:POVDxL<3:1>: PWM Output Override bits
1 = Output on PWMx I/O pin is controlled by the PWM generator
0 = Output on PWMx I/O pin is controlled by the value in the corresponding POUTxH:POUTxL bit
Unimplemented: Read as ‘0’
POUTxH<3:1>:POUTxL<3:1>: PWM Manual Output bits
1 = PWMx I/O pin is driven active when the corresponding POVDxH:POVDxL bit is cleared
0 = PWMx I/O pin is driven inactive when the corresponding POVDxH:POVDxL bit is cleared
U-0
U-0
—
—
W = Writable bit
‘1’ = Bit is set
POVD3H
POUT3H
R/W-1
R/W-0
POVD3L
POUT3L
R/W-1
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
POVD2H
POUT2H
R/W-1
R/W-0
POVD2L
POUT2L
R/W-1
R/W-0
(1)
© 2011 Microchip Technology Inc.
x = Bit is unknown
POVD1H
POUT1H
R/W-1
R/W-0
POVD1L
POUT1L
R/W-1
R/W-0
bit 8
bit 0