DSPIC33FJ128MC202-I/MM Microchip Technology, DSPIC33FJ128MC202-I/MM Datasheet - Page 47

IC DSPIC MCU/DSP 128K 28-QFN

DSPIC33FJ128MC202-I/MM

Manufacturer Part Number
DSPIC33FJ128MC202-I/MM
Description
IC DSPIC MCU/DSP 128K 28-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC202-I/MM

Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
28-QFN
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
8 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TABLE 4-1:
XMODSRT
XMODEND
YMODSRT
YMODEND
XBREV
DISICNT
Legend:
SFR Name
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
004C
Addr
0048
004A
004E
0050
SFR
0052
CPU CORE REGISTERS MAP (CONTINUED)
Bit 15
BREN
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
XS<15:1>
XE<15:1>
YS<15:1>
YE<15:1>
Bit 8
Disable Interrupts Counter Register
XB<14:0>
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
0
1
Resets
xxxx
xxxx
xxxx
xxxx
xxxx
xxxx
All

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