DSPIC33FJ128MC202-I/MM Microchip Technology, DSPIC33FJ128MC202-I/MM Datasheet - Page 78

• Manufacturer Part Number: DSPIC33FJ128MC202-I/MM
• Description: IC DSPIC MCU/DSP 128K 28-QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC202-I/MM

• Program Memory Type: FLASH
• Program Memory Size: 128KB (128K x 8)
• Package / Case: 28-QFN
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
5.2
The dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/
X04 and dsPIC33FJ128MCX02/X04 Flash program
memory array is organized into rows of 64 instructions
or 192 bytes. RTSP allows the user application to erase
a page of memory, which consists of eight rows (512
instructions) at a time, and to program one row or one
word at a time.
programming times. The 8-row erase pages and single
row write rows are edge-aligned from the beginning of
program memory, on boundaries of 1536 bytes and
192 bytes, respectively.
The program memory implements holding buffers that
can contain 64 instructions of programming data. Prior
to the actual programming operation, the write data
must be loaded into the buffers sequentially. The
instruction words loaded must always be from a group
of 64 boundary.
The basic sequence for RTSP programming is to set up
a Table Pointer, then do a series of TBLWT instructions
to load the buffers. Programming is performed by
setting the control bits in the NVMCON register. A total
of 64 TBLWTL and TBLWTH instructions are required
to load the instructions.
All of the table write operations are single-word writes
(two instruction cycles) because only the buffers are
written.
programming each row.
5.3
A complete programming sequence is necessary for
programming or erasing the internal Flash in RTSP
mode.
programming operation is finished.
The programming time depends on the FRC accuracy
(see
Tuning register (see
formula to calculate the minimum and maximum values
for the Row Write Time, Page Erase Time, and Word
Write Cycle Time parameters (see
EQUATION 5-1:
DS70291E-page 78
------------------------------------------------------------------------------------------------------------------------- -
7.37 MHz
Table
The
RTSP Operation
Programming Operations
A
31-19) and the value of the FRC Oscillator
programming
×
processor
(
FRC Accuracy
Table 31-12
Register
PROGRAMMING TIME
T
stalls
shows typical erase and
cycle
)%
9-4). Use the following
×
Table
(
(waits)
FRC Tuning
is
31-12).
required
until
)%
the
for
For example, if the device is operating at +125°C, the
FRC accuracy will be ±5%. If the TUN<5:0> bits (see
Register
write time is equal to
EQUATION 5-2:
The maximum row write time is equal to
EQUATION 5-3:
Setting the WR bit (NVMCON<15>) starts the
operation, and the WR bit is automatically cleared
when the operation is finished.
5.4
Two SFRs are used to read and write the program
Flash memory:
• NVMCON: The NVMCON register
• NVMKEY: NVMKEY
T
T
RW
RW
controls which blocks are to be erased, which
memory type is to be programmed and the start of
the programming cycle.
register that is used for write protection. To start a
programming or erase sequence, the user
application must consecutively write 0x55 and
0xAA to the NVMKEY register. Refer to
Section 5.3 “Programming Operations”
further details.
=
=
--------------------------------------------------------------------------------------------- - 1.586ms
7.37 MHz
---------------------------------------------------------------------------------------------- 1.435ms
7.37 MHz
9-4) are set to ‘b111111, the minimum row
Control Registers
×
×
(
(
11064 Cycles
11064 Cycles
1 0.05
1
Equation
–
+
MINIMUM ROW WRITE
TIME
MAXIMUM ROW WRITE
TIME
(Register
0.05
© 2011 Microchip Technology Inc.
)
)
×
×
(
5-2.
(
1 0.00375
1 0.00375
5-2) is a write-only
–
–
(Register
Equation
)
)
=
=
for
5-1)
5-3.