DSPIC33FJ32GS610-I/PT Microchip Technology, DSPIC33FJ32GS610-I/PT Datasheet - Page 313

• Manufacturer Part Number: DSPIC33FJ32GS610-I/PT
• Description: IC MCU/DSP 32KB FLASH 100TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ32GS610-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, QEI, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Core Frequency: 40MHz
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 85
• Flash Memory Size: 32KB
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 22-2:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
C = Clearable bit
bit 15-13
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note:
R/C-0, HS
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
P7RDY
U-0
—
Not all PxRDY bits are available on all devices. See Figure 22-1, Figure 22-2, Figure 22-3, and Figure 22-4
for the available analog inputs.
Unimplemented: Read as ‘0’
P12RDY: Conversion Data for Pair 12 Ready bit
Bit is set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P11RDY: Conversion Data for Pair 11 Ready bit
Bit is set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P10RDY: Conversion Data for Pair 10 Ready bit
Bit is set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P9RDY: Conversion Data for Pair 9 Ready bit
Bit is set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P8RDY: Conversion Data for Pair 8 Ready bit
Bit is set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P7RDY: Conversion Data for Pair 7 Ready bit
Bit is set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P6RDY: Conversion Data for Pair 6 Ready bit
Bit is set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P5RDY: Conversion Data for Pair 5 Ready bit
Bit is set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P4RDY: Conversion Data for Pair 4 Ready bit
Bit is set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P3RDY: Conversion Data for Pair 3 Ready bit
Bit is set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P2RDY: Conversion Data for Pair 2 Ready bit
Bit is set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P1RDY: Conversion Data for Pair 1 Ready bit
Bit is set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P0RDY: Conversion Data for Pair 0 Ready bit
Bit is set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
R/C-0, HS
P6RDY
U-0
—
ADSTAT: A/D STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
HS = Hardware Settable bit
R/C-0, HS
P5RDY
U-0
—
R/C-0, HS
R/C-0, HS
P12RDY
P4RDY
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/C-0, HS
R/C-0, HS
P11RDY
P3RDY
R/C-0, HS
R/C-0, HS
P10RDY
P2RDY
x = Bit is unknown
R/C-0, HS
R/C-0, HS
P9RDY
P1RDY
DS70591C-page 313
R/C-0, HS
R/C-0, HS
P8RDY
P0RDY
bit 8
bit 0