DSPIC33FJ128GP708-I/PT

Manufacturer Part NumberDSPIC33FJ128GP708-I/PT
DescriptionIC DSPIC MCU/DSP 128K 80TQFP
ManufacturerMicrochip Technology
SeriesdsPIC™ 33F
DSPIC33FJ128GP708-I/PT datasheets
 


Specifications of DSPIC33FJ128GP708-I/PT

Program Memory TypeFLASHProgram Memory Size128KB (128K x 8)
Package / Case80-TFQFPCore ProcessordsPIC
Core Size16-BitSpeed40 MIPs
ConnectivityCAN, I²C, IrDA, LIN, SPI, UART/USARTPeripheralsAC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o69Ram Size16K x 8
Voltage - Supply (vcc/vdd)3 V ~ 3.6 VData ConvertersA/D 24x10b/12b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
ProductDSCsData Bus Width16 bit
Processor SeriesDSPIC33FCoredsPIC
Maximum Clock Frequency40 MHzNumber Of Programmable I/os69
Data Ram Size16 KBMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development Tools52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By SupplierPG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033Minimum Operating Temperature- 40 C
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use With876-1001 - DSPIC33 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM300019 - BOARD DEMO DSPICDEM 80L STARTERDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164328 - MODULE SKT FOR 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
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3.4
DSP Engine
The DSP engine consists of a high-speed, single-
cycle, 17-bit x 17-bit multiplier, a barrel shifter and a
40-bit adder/subtractor with two target accumulators,
round and saturation logic, all of which enable efficient
execution
of
computationally
intensive
algorithms. The 17-bit x 17-bit multiplier is also utilized
for MCU-based multiply instructions.
The DSP engine also has the capability to perform
inherent accumulator-to-accumulator operations, which
require no additional data. These instructions are ADD,
SUB and NEG. This feature greatly simplifies basic
arithmetic operations on 32-bit or 40-bit data.
A block diagram of the DSP engine is shown in
Figure 3-4.
3.4.1
17 x 17-BIT MULTIPLIER
The 17 x 17-bit multiplier is capable of signed or
unsigned operation. It can suitably scale its output to
support either 1.31 fractional (Q31) or 32-bit integer
results, thereby diminishing the need to manually
post-process multiplication results for fractional data.
3.4.2
40-BIT ACCUMULATORS
The data accumulators have a 40-bit adder/subtractor
with automatic sign extension logic. It can select one of
two accumulators (A or B) as its pre-accumulation
source and post-accumulation destination. For the ADD
and LAC instructions, the data to be accumulated or
loaded can be optionally scaled via the barrel shifter
prior to accumulation.
The adder/subtractor generates overflow status bits,
SA/SB and OA/OB, which are latched and reflected in
the Status register and can also optionally generate an
arithmetic error trap:
• Overflow from bit 39. This is a catastrophic
overflow in which the sign of the accumulator is
destroyed.
• Overflow into guard bits 32 through 39. This is a
recoverable overflow. This bit (OA/OB) is set
whenever all the guard bits are not identical to
each other.
© 2005 Microchip Technology Inc.
3.4.3
SATURATION AND OVERFLOW
The adder has an additional saturation block that
controls accumulator data saturation, if selected. It
uses the result of the adder, the overflow status bits
described above and the user-configured control bits to
determine when to saturate and to what value to
DSP
saturate (a 40-bit or a 32-bit value).
In addition to adder/subtractor saturation, writes to data
space can also be saturated, but without affecting the
contents of the source accumulator.
The rounding logic performs a conventional (biased) or
convergent (unbiased) data rounding function during
an accumulator write (store). The Round mode is user-
selectable. Rounding generates a 16-bit, 1.15 data
value, which is passed to the data space write
saturation logic. Data space write saturation ensures
that the data in the accumulator is written back
accurately even when rounding is performed. If
rounding is not indicated by the instruction, a truncated
1.15 data value is stored and the least significant word
is simply discarded.
Preliminary
dsPIC33F
DS70155C-page 13