AT91SAM9R64-CU Atmel, AT91SAM9R64-CU Datasheet - Page 512

• Manufacturer Part Number: AT91SAM9R64-CU
• Description: MCU ARM9 64K SRAM 144-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9R64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 3 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 49
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 144LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

35.8
Table 35-4.
512
0x100- 0x124
0x50-0xFC
Offset
0x1C
0x2C
0x3C
0x4C
0x10
0x14
0x18
0x20
0x24
0x28
0x30
0x34
0x38
0x40
0x44
0x48
0xC
0x0
0x4
0x8
Synchronous Serial Controller (SSC) User Interface
AT91SAM9R64/RL64 Preliminary
Register Mapping
Control Register
Clock Mode Register
Reserved
Reserved
Receive Clock Mode Register
Receive Frame Mode Register
Transmit Clock Mode Register
Transmit Frame Mode Register
Receive Holding Register
Transmit Holding Register
Reserved
Reserved
Receive Sync. Holding Register
Transmit Sync. Holding Register
Receive Compare 0 Register
Receive Compare 1 Register
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Reserved
Reserved for Peripheral Data Controller (PDC)
Register
Register Name
SSC_RCMR
SSC_RFMR
SSC_TCMR
SSC_TFMR
SSC_RSHR
SSC_TSHR
SSC_RC0R
SSC_RC1R
SSC_CMR
SSC_RHR
SSC_THR
SSC_IMR
SSC_IER
SSC_IDR
SSC_CR
SSC_SR
–
–
–
–
–
–
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Access
Write
Read
Write
Read
Read
Write
Write
Read
–
–
–
–
–
–
6289C–ATARM–28-May-09
0x000000CC
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
–
–
–
–
–
–
–
–
–
–