AT91SAM9R64-CU Atmel, AT91SAM9R64-CU Datasheet - Page 76

MCU ARM9 64K SRAM 144-LFBGA

AT91SAM9R64-CU

Manufacturer Part Number
AT91SAM9R64-CU
Description
MCU ARM9 64K SRAM 144-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9R64-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
2-Wire, SPI, SSC, USART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 3 Channel
Controller Family/series
AT91SAM9xxx
No. Of I/o's
49
Ram Memory Size
64KB
Cpu Speed
240MHz
No. Of Timers
3
Rohs Compliant
Yes
Package
144LFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
240 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Figure 14-3. LDR Opcode
Figure 14-4. B Opcode
14.4.2
Figure 14-5. Structure of the ARM Vector 6
14.4.2.1
14.4.3
6289C–ATARM–28-May-09
Structure of ARM Vector 6
DataFlash Boot Sequence
Example
31
31
31
1
1
1
1
1
1
28 27
28 27
0
0
Unconditional instruction: 0xE for bits 31 to 28
Load PC with PC relative addressing instruction:
The ARM exception vector 6 is used to store information needed by the DataFlash boot pro-
gram. This information is described below.
An example of valid vectors follows:
The size of the image to load into SRAM is contained in the location of the sixth ARM vector.
Thus the user must replace this vector by the correct vector for his application.
The DataFlash boot program performs device initialization followed by the download procedure.
1
1
00
04
08
0c
10
14
18
1
0
– Rn = Rd = PC = 0xF
– I==1
– P==1
– U offset added (U==1) or subtracted (U==0)
– W==1
1
I
ea000006
eafffffe
ea00002f
eafffffe
eafffffe
00001234
eafffffe
24 23
24 23
P
0
U
1
Size of the code to download in bytes
W 0
B
B
B
B
B
B
20 19
0x20
0x04
_main
0x0c
0x10
0x18
Rn
AT91SAM9R64/RL64 Preliminary
<- Code size = 4660 bytes
16 15
Offset (24 bits)
Rd
12 11
0
0
0
76

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