LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 8

IC ARM CORTEX MCU 512K 100-LQFP

LPC1769FBD100,551

Manufacturer Part Number
LPC1769FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1769FBD100,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC17
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
Ethernet, USB, OTG, CAN
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4966
935290522551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1769FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 3.
LPC1769_68_67_66_65_64_4
Product data sheet
Symbol
P0[16]/RXD1/
SSEL0/SSEL
P0[17]/CTS1/
MISO0/MISO
P0[18]/DCD1/
MOSI0/MOSI
P0[19]/DSR1/
SDA1
P0[20]/DTR1/SCL1 58
P0[21]/RI1/RD1
P0[22]/RTS1/TD1
P0[23]/AD0[0]/
I2SRX_CLK/
CAP3[0]
P0[24]/AD0[1]/
I2SRX_WS/
CAP3[1]
Pin description
Pin
63
61
60
59
57
56
9
8
[2]
[2]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
…continued
Type
I/O
I
I/O
I/O
I/O
I
I/O
I/O
I/O
I
I/O
I/O
I/O
I
I/O
I/O
O
I/O
I/O
I
I
I/O
O
O
I/O
I
I/O
I
I/O
I
I/O
I
Description
P0[16] — General purpose digital input/output pin.
RXD1 — Receiver input for UART1.
SSEL0 — Slave Select for SSP0.
SSEL — Slave Select for SPI.
P0[17] — General purpose digital input/output pin.
CTS1 — Clear to Send input for UART1.
MISO0 — Master In Slave Out for SSP0.
MISO — Master In Slave Out for SPI.
P0[18] — General purpose digital input/output pin.
DCD1 — Data Carrier Detect input for UART1.
MOSI0 — Master Out Slave In for SSP0.
MOSI — Master Out Slave In for SPI.
P0[19] — General purpose digital input/output pin.
DSR1 — Data Set Ready input for UART1.
SDA1 — I
P0[20] — General purpose digital input/output pin.
DTR1 — Data Terminal Ready output for UART1. Can also be configured to be an
RS-485/EIA-485 output enable signal.
SCL1 — I
P0[21] — General purpose digital input/output pin.
RI1 — Ring Indicator input for UART1.
RD1 — CAN1 receiver input. (LPC1769/68/66/65/64 only).
P0[22] — General purpose digital input/output pin.
RTS1 — Request to Send output for UART1. Can also be configured to be an
RS-485/EIA-485 output enable signal.
TD1 — CAN1 transmitter output. (LPC1769/68/66/65/64 only).
P0[23] — General purpose digital input/output pin.
AD0[0] — A/D converter 0, input 0.
I2SRX_CLK — Receive Clock. It is driven by the master and received by the
slave. Corresponds to the signal SCK in the I
(LPC1769/68/67/66/65 only).
CAP3[0] — Capture input for Timer 3, channel 0.
P0[24] — General purpose digital input/output pin.
AD0[1] — A/D converter 0, input 1.
I2SRX_WS — Receive Word Select. It is driven by the master and received by the
slave. Corresponds to the signal WS in the I
(LPC1769/68/67/66/65 only).
CAP3[1] — Capture input for Timer 3, channel 1.
Rev. 04 — 1 February 2010
2
2
C1 clock input/output (this is not an I
C1 data input/output (this is not an I
LPC1769/68/67/66/65/64
32-bit ARM Cortex-M3 microcontroller
2
S-bus specification.
2
S-bus specification.
2
2
C-bus compliant open-drain pin).
C-bus compliant open-drain pin).
© NXP B.V. 2010. All rights reserved.
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