LPC2388FBD144,551 NXP Semiconductors, LPC2388FBD144,551 Datasheet - Page 23

IC ARM7 MCU FLASH 512K 144LQFP

LPC2388FBD144,551

Manufacturer Part Number
LPC2388FBD144,551
Description
IC ARM7 MCU FLASH 512K 144LQFP
Manufacturer
NXP Semiconductors
Series
LPC2300r
Datasheets

Specifications of LPC2388FBD144,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
144-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
104
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC23
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
104
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2388, MCB2388U, MCB2388UME
Development Tools By Supplier
OM11012
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
OM11012 - BOARD EVAL FOR LPC2388568-3999 - BOARD EVAL FOR LPC23 ARM MCU622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4323
935285417551
LPC2388FBD144-S

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NXP Semiconductors
LPC2388_0
Preliminary data sheet
7.11.1.1 Features
7.11.2.1 Features
7.11.1 USB device controller
7.11.2 USB Host Controller
7.11 USB interface
The Universal Serial Bus (USB) is a 4-wire bus that supports communication between a
host and one or more (up to 127) peripherals. The Host Controller allocates the USB
bandwidth to attached devices through a token-based protocol. The bus supports hot
plugging and dynamic configuration of the devices. All transactions are initiated by the
Host Controller.
The LPC2388 USB interface includes a device, Host, and OTG Controller. Details on
typical USB interfacing solutions can be found in
The device controller enables 12 Mbit/s data exchange with a USB Host Controller. It
consists of a register interface, serial interface engine, endpoint buffer memory, and a
DMA controller. The serial interface engine decodes the USB data stream and writes data
to the appropriate endpoint buffer. The status of a completed USB transfer or error
condition is indicated via status registers. An interrupt is also generated if enabled. When
enabled, the DMA controller transfers data between the endpoint buffer and the USB
RAM.
The Host Controller enables full- and low-speed data exchange with USB devices
attached to the bus. It consists of register interface, serial interface engine and DMA
controller. The register interface complies with the OHCI specification.
Fully compliant with USB 2.0 specification (full speed).
Supports 32 physical (16 logical) endpoints with a 4 kB endpoint buffer RAM.
Supports Control, Bulk, Interrupt and Isochronous endpoints.
Scalable realization of endpoints at run time.
Endpoint Maximum packet size selection (up to USB maximum specification) by
software at run time.
Supports SoftConnect and GoodLink features.
While the USB is in the Suspend mode, the LPC2388 can enter one of the reduced
power modes and wake up on USB activity.
Supports DMA transfers with the DMA RAM of 16 kB on all non-control endpoints.
Allows dynamic switching between CPU-controlled and DMA modes.
Double buffer implementation for Bulk and Isochronous endpoints.
OHCI compliant.
Two downstream ports.
Supports per-port power switching.
Rev. 00.01 — 23 October 2007
Section
11.1.
Fast communication chip
LPC2388
© NXP B.V. 2007. All rights reserved.
23 of 57

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