Z8F0213PJ005SC Zilog, Z8F0213PJ005SC Datasheet - Page 131

IC ENCORE MCU FLASH 2K 28DIP

Z8F0213PJ005SC

Manufacturer Part Number
Z8F0213PJ005SC
Description
IC ENCORE MCU FLASH 2K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F0213PJ005SC

Core Processor
Z8
Core Size
8-Bit
Speed
5MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
269-3461
PS024314-0308
Interrupts
Calibration and Compensation
4. When the first conversion in continuous operation is complete (after 5129 system
5. The ADC writes a new data result every 256 system clock cycles. For each completed
6. To disable continuous conversion, clear the CONT bit in the ADC Control register
The ADC is able to interrupt the CPU whenever a conversion has been completed and the
ADC is enabled.
When the ADC is disabled, an interrupt is not asserted; however, an interrupt pending
when the ADC is disabled is not cleared.
Z8 Encore! XP
error, with the compensation data stored in Flash memory. Alternatively, user code can
perform its own calibration, storing the values into Flash themselves.
Factory Calibration
Devices that have been factory calibrated contain nine bytes of calibration data in the
Flash option bit space. This data consists of three bytes for each reference type. For a list
of input modes for which calibration data exists, see
There is 1 byte for offset, 2 bytes for gain correction.
User Calibration
If you have precision references available, its own external calibration can be performed,
storing the values into Flash themselves.
clock cycles, plus the 40 cycles for power-up, if necessary), the ADC control logic
performs the following operations:
conversion, the ADC control logic performs the following operations:
to 0.
CEN resets to 0 to indicate the first conversion is complete. CEN remains 0 for all
subsequent conversions in continuous operation.
An interrupt request is sent to the Interrupt Controller to indicate the conversion is
complete.
Writes the 11-bit two’s complement result to {ADCD_H[7:0], ADCD_L[7:5]}.
An interrupt request to the Interrupt Controller denoting conversion complete.
®
F0823 Series ADC can be factory calibrated for offset error and gain
Zilog Calibration Data
Z8 Encore! XP
Product Specification
Analog-to-Digital Converter
®
F0823 Series
on page 147.
121

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