ST7FLITE25F2B6 STMicroelectronics, ST7FLITE25F2B6 Datasheet - Page 58

• Manufacturer Part Number: ST7FLITE25F2B6
• Description: IC MCU 8BIT 8K FLASH 20DIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE25F2B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: ST7FLITE2x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.4 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST7FLIT2-COS/COM, ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13 bit
• For Use With: 497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: In Transition
• Other names: 497-4858

ST7LITE2
12-BIT AUTORELOAD TIMER (Cont’d)
Figure 38. Block Diagram of Break Function
11.2.3.1 Input Capture
The 12-bit ATICR register is used to latch the val-
ue of the 12-bit free running upcounter after a ris-
ing or falling edge is detected on the ATIC pin.
When an input capture occurs, the ICF bit is set
and the ATICR register contains the value of the
Figure 39. Input Capture Timing Diagram
58/133
1
ICR REGISTER
BREAK pin
Note:
The BREAK pin value is latched by the BA bit.
COUNTER
ICF FLAG
f
ATIC PIN
COUNTER
(Active Low)
01h
BA
02h
xxh
PWM3
PWM2
PWM0
PWM1
BPEN
03h
PWM3
BREAKCR Register
04h
PWM2
(Inverters)
05h
PWM1
INTERRUPT
free running upcounter. An IC interrupt is generat-
ed if the ICIE bit is set. The ICF bit is reset by read-
ing the ATICR register when the ICF bit is set. The
ATICR is a read only register and always contains
the free running upcounter value which corre-
sponds to the most recent input capture. Any fur-
ther input capture is inhibited while the ICF bit is
set.
06h
PWM0
07h
04h
1
0
08h
When BA is set:
ATICR READ
PWM counter -> Reset value
ARR & DCRx -> Reset value
PWM Mode -> Reset value
09h
0Ah
09h
PWM0
PWM1
INTERRUPT
PWM2
PWM3
t