ST10R172LT6 STMicroelectronics, ST10R172LT6 Datasheet - Page 44

• Manufacturer Part Number: ST10R172LT6
• Description: IC MCU 16BIT LV ROMLESS 100-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10R172LT6

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, SSP, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 77
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-TQFP, 144-VQFP
• Processor Series: ST10R1x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SSP, USART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 77
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: In Transition
• Other names: 497-2044

ST10R172L - ELECTRICAL CHARACTERISTICS
44/68
1
Parameter
Data hold after RD
rising edge
Data float after RD rising
edge
Data valid to WR
Data hold after WR
ALE rising edge after RD,
WR
Address hold after RD, WR
Latched CS setup to ALE
Unlatched CS setup to
ALE
Latched CS low to Valid
Data In
Unlatched CS low to Valid
Data In
Latched CS hold after RD,
WR
Unlatched CS hold after
RD, WR
ALE fall. edge to RdCS,
WrCS (with RW delay)
ALE fall. edge to RdCS,
WrCS (no RW delay)
Address float after RdCS
(with RW delay)
Address float after RdCS
(no RW delay)
12))
1
1
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
18
19
22
23
25
27
38
38u
39
39u
40
40u
42
43
44
45
SR 0
SR –
CC 13 +
CC 13 +
CC 10 +
CC 10 +
CC -7 +
CC 3 +
SR –
SR –
CC 20 +
CC 10 +
CC 7 +
CC -3 +
CC –
CC –
Table 14 Multiplexed bus
Max. CPU Clock
= 50 MHz
min.
t
t
A
A
t
t
t
t
t
t
t
t
A
A
C
F
F
F
F
F
max.
–
15 +
–
–
–
–
3 +
–
13
+
23
+
–
–
–
–
3
13
1
t
t
1
C
C
t
A
+ 2
+ 2
t
F
2
t
t
A
A
Variable CPU Clock
1/2TCL = 1 to 50 MHz
min.
0
–
2TCL - 7 +
2TCL - 7+
2TCL - 10 +
2TCL - 10 +
-7 +
TCL - 7 +
–
–
3TCL - 10 +
2TCL - 10 +
TCL - 3 +
-3 +
–
–
t
t
A
A
t
t
t
A
A
t
F
C
t
t
t
t
F
F
F
F
max.
–
2TCL - 5 +
–
–
–
–
3 +
–
3TCL - 17
+
4TCL - 17
+
–
–
–
–
3
TCL + 3
1
t
t
C
C
t
A
+ 2
+ 2
t
t
1
A
A
t
F
2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns