C8051F813-GM Silicon Laboratories Inc, C8051F813-GM Datasheet - Page 13

• Manufacturer Part Number: C8051F813-GM
• Description: IC MCU 8BIT 8KB FLASH 20QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F81xr

Specifications of C8051F813-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Cap Sense, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-QFN
• Processor Series: C8051F8x
• Core: 8051
• Data Bus Width: 16 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F800DK
• Minimum Operating Temperature: - 55 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1786-5

C8051F80x-83x
SFR Definition 21.2. RSTSRC: Reset Source ............................................................ 128
SFR Definition 22.1. CLKSEL: Clock Select ............................................................... 130
SFR Definition 22.2. OSCICL: Internal H-F Oscillator Calibration .............................. 131
SFR Definition 22.3. OSCICN: Internal H-F Oscillator Control ................................... 132
SFR Definition 22.4. OSCXCN: External Oscillator Control ........................................ 134
SFR Definition 23.1. XBR0: Port I/O Crossbar Register 0 .......................................... 148
SFR Definition 23.2. XBR1: Port I/O Crossbar Register 1 .......................................... 149
SFR Definition 23.3. P0MASK: Port 0 Mask Register ................................................. 151
SFR Definition 23.4. P0MAT: Port 0 Match Register .................................................. 151
SFR Definition 23.5. P1MASK: Port 1 Mask Register ................................................. 152
SFR Definition 23.6. P1MAT: Port 1 Match Register .................................................. 152
SFR Definition 23.7. P0: Port 0 ................................................................................... 153
SFR Definition 23.8. P0MDIN: Port 0 Input Mode ....................................................... 154
SFR Definition 23.9. P0MDOUT: Port 0 Output Mode ................................................ 154
SFR Definition 23.10. P0SKIP: Port 0 Skip ................................................................. 155
SFR Definition 23.11. P1: Port 1 ................................................................................. 155
SFR Definition 23.12. P1MDIN: Port 1 Input Mode ..................................................... 156
SFR Definition 23.13. P1MDOUT: Port 1 Output Mode .............................................. 156
SFR Definition 23.14. P1SKIP: Port 1 Skip ................................................................. 157
SFR Definition 23.15. P2: Port 2 ................................................................................. 157
SFR Definition 23.16. P2MDOUT: Port 2 Output Mode .............................................. 158
SFR Definition 24.1. CRC0CN: CRC0 Control ........................................................... 163
SFR Definition 24.2. CRC0IN: CRC Data Input .......................................................... 164
SFR Definition 24.3. CRC0DATA: CRC Data Output ................................................. 164
SFR Definition 24.4. CRC0AUTO: CRC Automatic Control ........................................ 165
SFR Definition 24.5. CRC0CNT: CRC Automatic Flash Sector Count ....................... 165
SFR Definition 24.6. CRC0FLIP: CRC Bit Flip ............................................................ 166
SFR Definition 25.1. SPI0CFG: SPI0 Configuration ................................................... 174
SFR Definition 25.2. SPI0CN: SPI0 Control ............................................................... 175
SFR Definition 25.3. SPI0CKR: SPI0 Clock Rate ....................................................... 176
SFR Definition 25.4. SPI0DAT: SPI0 Data ................................................................. 176
SFR Definition 26.1. SMB0CF: SMBus Clock/Configuration ...................................... 186
SFR Definition 26.2. SMB0CN: SMBus Control .......................................................... 188
SFR Definition 26.3. SMB0ADR: SMBus Slave Address ............................................ 191
SFR Definition 26.4. SMB0ADM: SMBus Slave Address Mask .................................. 191
SFR Definition 26.5. SMB0DAT: SMBus Data ............................................................ 192
SFR Definition 27.1. SCON0: Serial Port 0 Control .................................................... 206
SFR Definition 27.2. SBUF0: Serial (UART0) Port Data Buffer .................................. 207
SFR Definition 28.1. CKCON: Clock Control .............................................................. 210
SFR Definition 28.2. TCON: Timer Control ................................................................. 215
SFR Definition 28.3. TMOD: Timer Mode ................................................................... 216
SFR Definition 28.4. TL0: Timer 0 Low Byte ............................................................... 217
SFR Definition 28.5. TL1: Timer 1 Low Byte ............................................................... 217
SFR Definition 28.6. TH0: Timer 0 High Byte ............................................................. 218
SFR Definition 28.7. TH1: Timer 1 High Byte ............................................................. 218
Rev. 1.0
13