C8051F813-GM Silicon Laboratories Inc, C8051F813-GM Datasheet - Page 219

• Manufacturer Part Number: C8051F813-GM
• Description: IC MCU 8BIT 8KB FLASH 20QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F81xr

Specifications of C8051F813-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Cap Sense, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-QFN
• Processor Series: C8051F8x
• Core: 8051
• Data Bus Width: 16 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F800DK
• Minimum Operating Temperature: - 55 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1786-5

28.2. Timer 2
Timer 2 is a 16-bit timer formed by two 8-bit SFRs: TMR2L (low byte) and TMR2H (high byte). Timer 2 may
operate in 16-bit auto-reload mode or (split) 8-bit auto-reload mode. The T2SPLIT bit (TMR2CN.3) defines
the Timer 2 operation mode. Timer 2 can also be used in capture mode to capture rising edges of the
Comparator 0 output.
Timer 2 may be clocked by the system clock, the system clock divided by 12, or the external oscillator
source divided by 8. The external clock mode is ideal for real-time clock (RTC) functionality, where the
internal oscillator drives the system clock while Timer 2 (and/or the PCA) is clocked by an external oscilla-
tor source. The external oscillator source divided by 8 is synchronized with the system clock when in all
operating modes except suspend. When the internal oscillator is placed in suspend mode, The external
clock/8 signal can directly drive the timer. This allows the use of an external clock to wake up the device
from suspend mode. The timer will continue to run in suspend mode and count up. When the timer over-
flow occurs, the device will wake from suspend mode, and begin executing code again. The timer value
may be set prior to entering suspend, to overflow in the desired amount of time (number of clocks) to wake
the device. If a wake-up source other than the timer wakes the device from suspend mode, it may take up
to three timer clocks before the timer registers can be read or written. During this time, the STSYNC bit in
register OSCICN will be set to 1, to indicate that it is not safe to read or write the timer registers.
28.2.1. 16-bit Timer with Auto-Reload
When T2SPLIT (TMR2CN.3) is zero, Timer 2 operates as a 16-bit timer with auto-reload. Timer 2 can be
clocked by SYSCLK, SYSCLK divided by 12, or the external oscillator clock source divided by 8. As the
16-bit timer register increments and overflows from 0xFFFF to 0x0000, the 16-bit value in the Timer 2
reload registers (TMR2RLH and TMR2RLL) is loaded into the Timer 2 register as shown in Figure 28.4,
and the Timer 2 High Byte Overflow Flag (TMR2CN.7) is set. If Timer 2 interrupts are enabled (if IE.5 is
set), an interrupt will be generated on each Timer 2 overflow. Additionally, if Timer 2 interrupts are enabled
and the TF2LEN bit is set (TMR2CN.5), an interrupt will be generated each time the lower 8 bits (TMR2L)
overflow from 0xFF to 0x00.
External Clock / 8
SYSCLK / 12
SYSCLK
T2XCLK
0
1
M
H
T
3
Figure 28.4. Timer 2 16-Bit Mode Block Diagram
T
M
3
L
CKCON
T
M
H
2
M
T
0
1
2
L
M
T
1
M
T
0
C
S
A
1
C
S
A
0
TR2
TCLK
Rev. 1.0
Overflow
TL2
TMR2RLL TMR2RLH
TMR2L
To SMBus
TMR2H
Reload
C8051F80x-83x
To ADC,
SMBus
T2SPLIT
TF2CEN
T2XCLK
TF2LEN
TF2H
TF2L
TR2
Interrupt
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