C8051F813-GM Silicon Laboratories Inc, C8051F813-GM Datasheet - Page 56

IC MCU 8BIT 8KB FLASH 20QFN

C8051F813-GM

Manufacturer Part Number
C8051F813-GM
Description
IC MCU 8BIT 8KB FLASH 20QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F81xr
Datasheet

Specifications of C8051F813-GM

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
Processor Series
C8051F8x
Core
8051
Data Bus Width
16 bit
Data Ram Size
512 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
17
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F800DK
Minimum Operating Temperature
- 55 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
336-1786-5
C8051F80x-83x
8.5. ADC0 Analog Multiplexer
ADC0 on the C8051F800/1/2/3/4/5, C8051F812/3/4/5/6/7, C8051F824/5/6, and C8051F830/1/2 uses an
analog input multiplexer to select the positive input to the ADC. Any of the following may be selected as the
positive input: Port 0 or Port 1 I/O pins, the on-chip temperature sensor, or the positive power supply (V
The ADC0 input channel is selected in the ADC0MX register described in SFR Definition 8.9.
Important Note About ADC0 Input Configuration: Port pins selected as ADC0 inputs should be config-
ured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for analog
input, set the corresponding bit in register PnMDIN to 0. To force the Crossbar to skip a Port pin, set the
corresponding bit in register PnSKIP to 1. See Section “23. Port Input/Output” on page 138 for more Port
I/O configuration details.
56
Sensor
Temp
Note: P1.4-P1.7
are not available
on the 16-pin
packages.
VREG Output
Figure 8.6. ADC0 Multiplexer Block Diagram
P0.0
P1.7
GND
VDD
ADC0MX
Rev. 1.0
AMUX
ADC0
DD
).

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