R5F21256SNFP#U0 Renesas Electronics America, R5F21256SNFP#U0 Datasheet - Page 495

• Manufacturer Part Number: R5F21256SNFP#U0
• Description: IC R8C MCU FLASH 32K 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21256SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• For Use With: R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
21.8
21.8.1
Table 21.2
NOTES:
Mode
EW0 During auto-erasure Any interrupt can be used by
21.8.1.1
21.8.1.2
21.8.1.3
1. Do not use the address match interrupt while a command is being executed because the vector of
2. Do not use a non-maskable interrupt while block 0 is being automatically erased because the fixed
Before entering CPU rewrite mode (EW0 mode), select 5 MHz or below for the CPU clock using the CM06 bit
in the CM0 register and bits CM16 to CM17 in the CM1 register. This does not apply to EW1 mode.
The following instructions cannot be used in EW0 mode because they reference data in the flash memory:
UND, INTO, and BRK.
Table 21.2 lists the EW0 Mode Interrupts, and Table 21.3 lists the EW1 Mode Interrupts.
the address match interrupt is allocated in ROM.
vector is allocated in block 0.
Notes on Flash Memory
Auto-programming
Feb 29, 2008
CPU Rewrite Mode
Operating Speed
Prohibited Instructions
Interrupts
EW0 Mode Interrupts
Status
Page 476 of 485
allocating a vector in RAM
Request is Acknowledged
When Maskable Interrupt
Once an interrupt request is
acknowledged, auto-programming or
auto-erasure is forcibly stopped
immediately and the flash memory is
reset. Interrupt handling starts after the
fixed period and the flash memory
restarts. Since the block during auto-
erasure or the address during auto-
programming is forcibly stopped, the
normal value may not be read. Execute
auto-erasure again and ensure it
completes normally.
Since the watchdog timer does not stop
during the command operation,
interrupt requests may be generated.
Reset the watchdog timer regularly.
Voltage Monitor 2 Interrupt Request is
Stop Detection, Voltage Monitor 1, or
When Watchdog Timer, Oscillation
Acknowledged
21. Usage Notes