MC56F8037VLH Freescale Semiconductor, MC56F8037VLH Datasheet - Page 163

IC DSP 16BIT DUAL 64-LQFP

MC56F8037VLH

Manufacturer Part Number
MC56F8037VLH
Description
IC DSP 16BIT DUAL 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8037VLH

Core Processor
56800
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Data Bus Width
16 bit
Processor Series
MC56F80xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
32 MIPs
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
53
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MC56F8037EVM
Interface Type
SCI, SPI, I2C
Minimum Operating Temperature
- 40 C
Package
64LQFP
Family Name
56F8xxx
Maximum Speed
32 MHz
On-chip Adc
2(8-chx10-bit)
On-chip Dac
2-chx12-bit
Number Of Timers
5
For Use With
MC56F8037EVM - BOARD EVAL FOR MC56F8037
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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10.16 Equivalent Circuit for ADC Inputs
Figure 10-18
at the same time that S3 is closed/open. When S1/S2 are closed and S3 is open, one input of the sample
and hold circuit moves to (V
the switches are flipped, the charge on C1 and C2 are averaged via S3, with the result that a single-ended
analog input is switched to a differential voltage centered about (V
switch on every cycle of the ADC clock (open one-half ADC clock, closed one-half ADC clock). Note that
there are additional capacitances associated with the analog input pad, routing, etc., but these do not filter
into the S/H output voltage, as S1 provides isolation during the charge-sharing phase.
One aspect of this circuit is that there is an on-going input current, which is a function of the analog input
voltage, V
10.17 Comparator (CMP) Parameters
Freescale Semiconductor
1. No guaranteed specification within 0.1V of V
Input Offset Voltage
Input Propagation Delay
Power-up time
1.
2.
3.
4.
Analog Input
Parasitic capacitance due to package, pin-to-pin and pin-to-package base coupling; 1.8pF
Parasitic capacitance due to the chip bond pad, ESD protection devices and signal routing; 2.04pF
Equivalent resistance for the channel select mux; 100 ohms
Sampling capacitor at the sample and hold circuit. Capacitor C1 is normally disconnected from the input and is only
connected to it at sampling time; 1.4pF
Parameter
REF
illustrates the ADC input circuit during sample and hold. S1 and S2 are always open/closed
, and the ADC clock frequency.
1
1
Figure 10-18 Equivalent Circuit for A/D Loading
Within range of V
REFHx
2
Conditions/Comments
V
- V
Table 10-21 CMP Parameters
SSA
56F8037/56F8027 Data Sheet, Rev. 7
REFLx
DDA
+ .1V
125 ESD Resistor
DDA
or V
(V
) / 2, while the other charges to the analog input voltage. When
REFHx
SSA
- .1V to
3
- V
REFLx
) / 2
V
Symbol
OFFSET
t
t
CPU
PD
8pF noise damping capacitor
S1
S2
Min
REFHx
4
S3
- V
C2
C1
TBD
Typ
±10
35
REFLx
Equivalent Circuit for ADC Inputs
S/H
) / 2. The switches
C1 = C2 = 1pF
Max
TBD
±35
45
Unit
mV
ns
163

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