MCF52232CAF50 Freescale Semiconductor, MCF52232CAF50 Datasheet - Page 17

• Manufacturer Part Number: MCF52232CAF50
• Description: IC MCU 32BIT 128K FLASH 80-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF5223xr

Specifications of MCF52232CAF50

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Cpu Family: MCF5223x
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 50MHz
• Interface Type: I2C/QSPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 10
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: LQFP
• Processor Series: MCF522x
• Core: ColdFire V2
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 10
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: M52235EVB, M52233DEMO
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Generation
Pin Group
Debug
ADC
Clock
Data
3
DDATA[3:0]
Function
VDDPLL
PST[3:0]
Primary
VSSPLL
ALLPST
SYNCA
SYNCB
EXTAL
VDDA
VSSA
XTAL
VRH
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
VRL
5
SecondaryF
CANTX
CANRX
unction
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4
4
Table 3. Pin Functions by Primary and Alternate Purpose
FEC_MDIO
FEC_MDC
Function
Tertiary
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Quaternary
Function
PDD[7:4]
PDD[3:0]
PAN[7]
PAN[6]
PAN[5]
PAN[4]
PAN[3]
PAN[2]
PAN[1]
PAN[0]
PAS[3]
PAS[2]
—
—
—
—
—
—
—
—
—
PDSR[39]
PDSR[39]
Strength/
Control
Drive
High
High
High
Low
Low
Low
Low
Low
Low
Low
Low
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1
Wired OR
Control
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
—
—
—
—
—
—
—
—
—
—
—
—
—
Pull-down
Pull-up/
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
E1, F3,F2, F1
Pin on 121
MAPBGA
D10, D9,
E10, E9
A10
B10
A11
B11
C9
B9
A9
C8
K1
A8
A7
B8
B7
K6
K7
D3
J1
L7
J7
12,13,16,17
80,79,78,77
Pin on 112
LQFP
88
87
86
85
89
90
91
92
28
27
93
96
94
95
48
49
45
47
7
Pin on 80
LQFP
64
63
62
61
65
66
67
68
20
19
69
72
70
71
36
37
33
35
—
—
7