PIC14000-04/SS Microchip Technology, PIC14000-04/SS Datasheet - Page 23

IC MCU OTP 4KX14 A/D 28SSOP

PIC14000-04/SS

Manufacturer Part Number
PIC14000-04/SS
Description
IC MCU OTP 4KX14 A/D 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 14r

Specifications of PIC14000-04/SS

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C
Peripherals
POR, Temp Sensor, WDT
Number Of I /o
20
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
Slope A/D
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SSOP
Processor Series
PIC14000
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
1
Operating Supply Voltage
2.7 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
On-chip Adc
14 bit
For Use With
309-1025 - ADAPTER 28-SSOP TO 28-DIPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC14000-04/SS
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
PIC14000-04/SS
Manufacturer:
MICROCHI
Quantity:
20 000
4.3
The program counter (PC) is 13-bits wide. The low
byte, PCL, is a readable and writable register. The high
byte of the PC (PCH) is not directly readable or
writable. PCLATH is a holding register for PC<12:8>
where contents are transferred to the upper byte of the
program counter. When PC is loaded with a new value
during a CALL, GOTO or a write to PCL, the high bits of
PC are loaded from PCLATH as shown in Figure 4-9.
FIGURE 4-9:
4.3.1
When doing a table read using a computed GOTO
method, care should be exercised if the table location
crosses a PCL memory boundary (each 256 byte
block). Refer to the application note “Table Read Using
the PIC16CXX”(AN556).
4.3.2
The PIC14000 has an 8 deep x 13-bit wide hardware
stack (Figure 4-1). The stack space is not part of either
program or data space and the stack pointer is not
readable or writable. The PC is PUSHed in the stack
when a CALL instruction is executed or an interrupt is
acknowledged. The stack is POPed in the event of a
RETURN, RETLW or a RETFIE instruction execution.
PCLATH is not affected by a “PUSH” or a “POP”
operation.
The stack operates as a circular buffer. This means
that after the stack has been “PUSHed” eight times, the
ninth push overwrites the value that was stored from
the first push. The tenth push overwrites the second
push (and so on).
PC
PC
1996 Microchip Technology Inc.
Note:
12
12 11 10
2
5
PCL and PCLATH
COMPUTED GOTO
STACK
PCH
PCLATH<4:3>
PCH
On POR, the contents of the PCLATH
register are unknown. The PCLATH should
be initialized before a CALL, GOTO, or any
instruction that modifies the PCL register is
executed.
PCLATH
PCLATH<4:0>
8
PCLATH
8
LOADING OF PC IN
DIFFERENT SITUATIONS
7
7
PCL
PCL
11
8
0
0
INST with PCL
ALU result
GOTO, CALL
Opcode <10:0>
as dest
Preliminary
4.3.3
The PIC14000 has 4K of program memory, but the
CALL and GOTO instructions only have a 11-bit address
range. This 11-bit address range allows a branch within
a 2K program memory page size. To allow CALL and
GOTO instructions to address the entire 4K program
memory address range, there must be another bit to
specify the program memory page. This paging bit
comes from the PCLATH<3> bit (Figure 4-9). When
doing a CALL or GOTO instruction, the user must ensure
that this page bit (PCLATH<3>) is programmed to the
desired program memory page. If a CALL instruction (or
interrupt) is executed, the entire 13-bit PC is pushed
onto the stack. Therefore, manipulation of the
PCLATH<3> is not required for the return instructions
(which pops the PC from the stack).
Example 4-1 shows the calling of a subroutine in
page 1 of the program memory. This example assumes
that the PCLATH is saved and restored by the interrupt
service routine (if interrupts are used).
EXAMPLE 4-1:
ORG 0X500
BSF
CALL
ORG 0X900
SUB1 P1 :
RETURN
Note:
Note 1: There are no STATUS bits to indicate
Note 2: There are no instruction mnemonics
PROGRAM MEMORY PAGING
PCLATH, 3 ; Select page 1 (800h-FFFh)
SUB1_P1
:
:
:
:
:
The PIC14000 ignores the PCLATH<4>
bit, which is used for program memory
pages 2 and 3 (1000h-1FFFh). The use of
PCLATH<4>
read/write bit is not recommended since
this may affect upward compatibility with
future products.
stack
conditions.
called PUSH nor POP. These are actions
that occur from the execution of the CALL,
RETURN, RETLW, or RETFIE instructions,
or the vectoring to an interrupt address
overflow
CALL OF A SUBROUTINE IN
PAGE 1 FROM PAGE 0
; Call subroutine in
; page 1 (800h-FFFh)
; called subroutine
; page 1 (800h-FFFh)
; return to page 0
; (000h-7FFh)
as
PIC14000
or
a
general
stack
DS40122B-page 23
underflow
purpose

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