PIC14000-04/SS Microchip Technology, PIC14000-04/SS Datasheet - Page 44

• Manufacturer Part Number: PIC14000-04/SS
• Description: IC MCU OTP 4KX14 A/D 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 14r

Specifications of PIC14000-04/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C
• Peripherals: POR, Temp Sensor, WDT
• Number Of I /o: 20
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Data Converters: Slope A/D
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SSOP
• Processor Series: PIC14000
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 192 B
• Interface Type: SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 1
• Operating Supply Voltage: 2.7 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 14 bit
• For Use With: 309-1025 - ADAPTER 28-SSOP TO 28-DIPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC14000
TABLE 7-1:
FIGURE 7-4:
FIGURE 7-5:
DS40122B-page 44
Term
Transmitter
Receiver
Master
Slave
Multi-master
Arbitration
Synchronization
ACK
S
R/W
S 1
S
R/W
ACK
1 1 1 0 A9 A8 RW ACK A7 A6 A5 A4 A3 A2 A1 A0 ACK
-
-
-
Start Condition
Acknowledge
Read/Write pulse
S
Start Condition
Read/Write Pulse
Acknowledge
MSb
I
I
FORMAT
I
2
2
2
slave address
C 7-BIT ADDRESS FORMAT
C 10-BIT ADDRESS
C BUS TERMINOLOGY
Description
The device that sends the data to the bus.
The device that receives the data from the bus.
The device which initiates the transfer, generates the clock, and terminates the transfer.
The device addressed by a master.
More than one master device in a system. These masters can attempt to control the bus
at the same time without corrupting the message.
Procedure that ensures that only one of the master devices will control the bus. This
ensures that the transfer data does not get corrupted.
Procedure where the clock signals of two or more devices are synchronized.
sent by slave
= 0 for write
LSb
R/W ACK
Sent by
Slave
Preliminary
7.2
There are two address formats. The simplest is the
7-bit address format with a R/W bit (Figure 7-4). The
address is the most significant seven bits of the byte.
For example when loading the I
least significant bit is a “don’t care”. The more complex
is the 10-bit address with a R/W bit (Figure 7-5). For
10-bit address format, two bytes must be transmitted
with the first five bits specifying this to be a 10-bit
address.
Addressing I
2
C Devices
1996 Microchip Technology Inc.
2
CADD register, the