PIC14000-04/SS Microchip Technology, PIC14000-04/SS Datasheet - Page 39

IC MCU OTP 4KX14 A/D 28SSOP

PIC14000-04/SS

Manufacturer Part Number
PIC14000-04/SS
Description
IC MCU OTP 4KX14 A/D 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 14r

Specifications of PIC14000-04/SS

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C
Peripherals
POR, Temp Sensor, WDT
Number Of I /o
20
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
Slope A/D
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SSOP
Processor Series
PIC14000
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
1
Operating Supply Voltage
2.7 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
On-chip Adc
14 bit
For Use With
309-1025 - ADAPTER 28-SSOP TO 28-DIPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC14000-04/SS
Manufacturer:
Microchip Technology
Quantity:
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Part Number:
PIC14000-04/SS
Manufacturer:
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Quantity:
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6.2
When the external clock input (pin RC3/T0CKI) is used
for Timer0, it must meet certain requirements. The
external clock requirement is due to internal phase
clock (T
the actual incrementing of TMR0 after synchronization.
6.2.1
When no prescaler is used, the external clock input is
the same as the prescaler output. The synchronization
of
accomplished by sampling the prescaler output on the
Q2 and Q4 cycles of the internal phase clocks
(Figure 6-5). Therefore, it is necessary for T0CKI to be
high for at least 2Tosc (and a small RC delay of 20 ns)
and low for at least 2Tosc (and a small RC delay of
20 ns).
When a prescaler is used, the external clock input is
divided by the asynchronous ripple counter-type
prescaler so that the prescaler output is symmetrical.
For the external clock to meet the sampling
requirement, the ripple counter must be taken into
account. Therefore, it is necessary for T0CKI to have a
period of at least 4Tosc (and a small RC delay of 40 ns)
divided by the prescaler value. The only requirement
on T0CKI high and low time is that they do not violate
the minimum pulse width requirement of 10 ns.
FIGURE 6-5:
1996 Microchip Technology Inc.
T0CKI
OSC
Using Timer0 with External Clock
EXTERNAL CLOCK SYNCHRONIZATION
OUTPUT AFTER SAMPLING
PRESCALER OUT (NOTE 2)
Notes:
1.
2.
3.
EXT CLOCK/PRESCALER
) synchronization. Also, there is a delay in
with
Delay from clock input change to TMR0 increment is 3 T
Therefore, the error in measuring the interval between two edges on TMR0 input =
External clock if no prescaler selected, Prescaler output otherwise.
The arrows indicate the points in time where sampling occurs.
INCREMENT TMR0 (Q4)
EXT CLOCK INPUT OR
TIMER0 TIMING WITH EXTERNAL CLOCK
the
internal
TMR0
phase
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
clocks
Preliminary
is
T0
6.2.2
Since the prescaler output is synchronized with the
internal clocks, there is a small delay from the time the
external clock edge occurs to the time the Timer0
module is actually incremented. Figure 6-5 shows the
delay from the external clock edge to the timer
incrementing.
6.3
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a post-scaler for the Watchdog
Timer (Figure 6-1). For simplicity, this counter is being
referred to as “prescaler” throughout this data sheet.
Note that there is only one prescaler available which is
mutually exclusive between the Timer0 module and the
Watchdog Timer. Thus, a prescaler assignment for the
Timer0 module means that there is no prescaler for the
Watchdog Timer, and vice-versa.
Bit PSA and PS2:PS0 (OPTION<3:0>) determine the
prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing to the Timer0 module (e.g., CLRF 1, MOVWF 1,
BSF 1,x ) will clear the prescaler. When assigned to
WDT, a CLRWDT instruction will clear the prescaler
along with the Watchdog Timer. The prescaler is not
readable or writable.
OSC
to 7 T
TIMER0 INCREMENT DELAY
Prescaler
OSC
. (Duration of Q = T
T0 + 1
4 tosc max.
PIC14000
(note 3)
OSC
).
T0 + 2
Small pulse
misses sampling
DS40122B-page 39

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