PIC14000-04/SS Microchip Technology, PIC14000-04/SS Datasheet - Page 67

• Manufacturer Part Number: PIC14000-04/SS
• Description: IC MCU OTP 4KX14 A/D 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 14r

Specifications of PIC14000-04/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C
• Peripherals: POR, Temp Sensor, WDT
• Number Of I /o: 20
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Data Converters: Slope A/D
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SSOP
• Processor Series: PIC14000
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 192 B
• Interface Type: SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 1
• Operating Supply Voltage: 2.7 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 14 bit
• For Use With: 309-1025 - ADAPTER 28-SSOP TO 28-DIPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

FIGURE 9-2:
9.5
9.5.1
The PIC14000 includes two independent low-power
comparators for comparing the programmable refer-
ence outputs to either the RA1/AN1 or RA5/AN5 pins.
The negative input of each comparator is tied to one of
the reference outputs as shown in Figure 9-3. The
comparator positive inputs are connected to the output
of the RA1/AN1 and RA5/AN5 level-shift networks.
At reset, the RA1/AN1 level-shift output is connected to
the positive inputs of both comparators. This allows a
window comparison of the RA1/AN1 voltage using the
two programmable references and comparators. Set-
ting CMBOE (CMCON<5>) changes the configuration
so that RA1/AN1 and RA5/AN5 may be independently
monitored.
The comparator outputs can be read by the CMAOUT
(CMCON<2>) and CMBOUT (CMCON<6>) bits. These
are read-only bits and writes to these locations have no
effect.
Either a rising or falling comparator output can gener-
ate an interrupt to the CPU as controlled by the polarity
bits CPOLA (CMCON<0>) and CPOLB (CMCON<4>).
The CMIF bit (PIR1<7>) interrupt flag is set whenever
the exclusive-OR of the comparator output CMxOUT
and the CPOLx bits equal a logic one. As with other
peripheral interrupts, the corresponding enable bit
CMIE (PIE1<7>) must also be set to enable the com-
parator interrupt. In addition, the global interrupt enable
and peripheral interrupt enable bits INTCON<7:6>
must also be set. This comparator interrupt is level sen-
sitive.
1996 Microchip Technology Inc.
REFOFF (SLPCON<5>)
Comparator and Programmable
Reference Modules
COMPARATORS
SREFLO
K
REF
Reference
Bandgap
SLOPE REFERENCE DIVIDER
=
~
SREFHI
SREFHI - SREFLO
9
SREFLO
V
REF
ADOFF (SLPCON<0>)
Preliminary
+
_
The
RC1/CMPA or RD2/CMPB pins by setting the CMAOE
(CMCON<1>) or CMBOE (CMCON<5>) bits. Setting
CMxOE does not affect the comparator operation. It
only enables the pin function regardless of the port
TRIS register setting.
Both the references and the comparators are enabled
by clearing the CMOFF (SLPCON<2>) bit.
9.5.2
The PIC14000 includes two independent, programma-
ble voltage references. Each reference is built using
two resistor ladders, bandgap-referenced current
source, and analog multiplexers. The first ladder con-
tains 32 taps, and is divided into three ranges (upper,
middle, and lower) to provide a coarse voltage adjust-
ment. The coarse ladder includes 1k and 10k resistors
yielding a step size of either 5 or 50 mV (nominal)
depending on the selected range. Figure 9-8 shows the
comparator and reference architecture.
across the selected coarse ladder resistor to increase
resolution. This subdivides the coarse ladder step by
approximately 1/8. Thus, resolutions approaching 5/8
mV are obtainable.
A second ladder contains eight taps, and is connected
comparator
PROGRAMMABLE REFERENCES
outputs
SREFHI
SREFLO
PIC14000
are
visible
DS40122B-page 67
To A/D
MUX
at
either