EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 100

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

3
3-30
MaverickCrunch Co-Processor
EP93xx User’s Guide
31:28
31:28
31:28
cond
cond
cond
Description:
Mnemonic:
Bit Definitions:
Description:
Mnemonic:
Bit Definitions:
Description:
Mnemonic:
Bit Definitions:
1 1 1 0
1 1 1 0
1 1 1 0
27:24
27:24
27:24
Move 64-bit Integer from Accumulator
Move 64-bit Integer to Accumulator
Move from MaverickCrunch Register to Control/Status Register
Saturates and rounds an accumulator value to 64 bits and moves the result to
a MaverickCrunch register.
CFMV64A<cond> CRd, CRn
CRd:
CRn:
Moves a 64-bit value from a MaverickCrunch register to an accumulator and
sign extend to 72 bits.
CFMVA64<cond> CRd, CRn
CRd:
CRn:
Moves a 64-bit value from a MaverickCrunch register to the MaverickCrunch
Status/Control register, DSPSC. All DSPSC bits are writable. CRn is ignored.
CFMVSC32<cond> CRd, CRn
CRd:
23:22
23:22
23:22
0 0
0 0
0 0
21:20
21:20
21:20
0 1
1 0
1 0
Copyright 2007 Cirrus Logic
Destination register
Source accumulator
Destination accumulator
Source register
Source register
19:16
19:16
19:16
CRn
CRn
CRn
15:12
15:12
15:12
CRd
CRd
CRd
0 1 0 0
0 1 0 0
0 1 0 0
11:8
11:8
11:8
1 1 0
1 1 0
1 1 1
7:5
7:5
7:5
4
4
4
0
0
0
DS785UM1
CRm
CRm
CRm
3:0
3:0
3:0