Z16F2810VH20SG Zilog, Z16F2810VH20SG Datasheet - Page 57

• Manufacturer Part Number: Z16F2810VH20SG
• Description: IC ZNEO MCU FLASH 128K 68PLCC
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F2810VH20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-LCC (J-Lead)
• Processor Series: Z16F2x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4536

PS022008-0810
Operation
External WAIT Pin Operation
Wait State Generator
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For details on how the ZDS II development tools use memory, refer to Zilog Developer
Studio II— ZNEO User Manual (UM0171).
Setup of the external WAIT pin is selected by the GPIO alternate function. When using the
external WAIT pin, at least one internal Wait state must be added to allow sufficient
address valid to wait input setup time.
Programmable Wait states are inserted to provide external devices with additional clock
cycles to complete their Read and Write operations. The number of Wait states are
Any external volatile (random access) memory must be located at or above
The ZDS II GUI assumes external I/O is located in the range
Any external non-volatile memory must be located above the internal Flash in the
External volatile memory falling below
External volatile memory must not be located above internal RAM, which ends at
address space, but below any volatile (random access) memory. There is a gap or hole
in the address space between internal and external non-volatile memory, and between
non-volatile and volatile memory.
in the 24-bit address space (in the CS1 range). This is a requirement of the ZDS II
GUI. Volatile memory on CS0 is located in a lower address range if it is configured by
adding an edited linker RANGE command to the Additional Linker Commands field
of the ZDS II project settings.
Any external I/O that is located elsewhere is accessed using absolute addressing. The
debugger memory window displays all addresses below
Memory space.
External volatile memory at or above
FF_BFFFH
FF_C000H
must be configured by adding an edited linker RANGE command to the Additional
Linker Commands field of the project settings. The debugger memory window always
displays this range as part of the I/O Data space, however.
block. The ZDS II C-Compiler large model does not support holes in 32-bit addressed
volatile memory. There is a hole between this memory and volatile memory at or
above
contiguous with the microcontroller’s internal RAM. The ZDS II C-Compiler small
model does not support holes in 16-bit addressable volatile memory.
FF_8000H
. This is a requirement of the ZDS II GUI. Volatile memory is located at
and extend up to
, however.
P R E L I M I N A R Y
FF_DFFFH
FF_8000H
if the space is not used for I/O, but the range
FF_8000H
must be addressed as a contiguous
must be addressed as a block
FF_C000H
Product Specification
FF_C000H
ZNEO
External Interface
as part of the
Z16F Series
to
FF_DFFFH
80_0000H
.
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