Z16F2810VH20SG Zilog, Z16F2810VH20SG Datasheet - Page 78

• Manufacturer Part Number: Z16F2810VH20SG
• Description: IC ZNEO MCU FLASH 128K 68PLCC
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F2810VH20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-LCC (J-Lead)
• Processor Series: Z16F2x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4536

Table 20. Stop Mode Recovery Sources and Resulting Action
PS022008-0810
Operating Mode
STOP mode
Stop Mode Recovery Using WDT Time-Out
Stop Mode Recovery Using a GPIO Port Pin Transition
Caution:
Stop Mode Recovery only affects the contents of the
page 64 and
any other values in the register file, including the stack pointer, register pointer, flags,
peripheral control registers, and general-purpose RAM.
The ZNEO CPU fetches the Reset vector at program memory addresses
and loads that value into the program counter. Program execution begins at the Reset
vector address. Following Stop Mode Recovery, the STOP bit in the
Control Register
resulting actions. The following text provides more detailed information on each of the
Stop Mode Recovery sources.
If the WDT times out during STOP mode, the device undergoes a Stop Mode Recovery
sequence. In the
set to 1. If the WDT is configured to generate a System Exception on time-out, the ZNEO
CPU services the WDT System Exception following the normal Stop Mode Recovery
sequence.
Each of the GPIO port pins is configured as a Stop Mode Recovery input source. If any
GPIO pin enabled as a Stop Mode Recovery source, a change in the input pin value (from
High to Low or from Low to High) initiates Stop Mode Recovery. The GPIO Stop Mode
Recovery signals are filtered to reject pulses less than 10 ns (typical) in duration. In the
Reset Status and Control Register
Stop Mode Recovery Source
WDT time-out when configured for
Reset
WDT time-out when configured for
System Exception
Data transition on any GPIO Port pin
enabled as a Stop Mode Recovery
source
Short pulses on the port pin initiates Stop Mode Recovery without initiat-
ing an interrupt (if enabled for that pin).
Oscillator Control Register
Reset Status and Control Register
on page 64 is set to 1.
P R E L I M I N A R Y
on page 64, the STOP bit is set to 1.
Table 20
on page 333. Stop Mode Recovery does not affect
Action
Stop Mode Recovery
Stop Mode Recovery followed by WDT
System Exception
Stop Mode Recovery
lists the Stop Mode Recovery sources and
on page 64, the WDT and STOP bits are
Reset Status and Control Register
Reset and Stop Mode Recovery
Product Specification
ZNEO
Reset Status and
0004H-0007H
Z16F Series
on
63