ST10F272Z2Q3 STMicroelectronics, ST10F272Z2Q3 Datasheet - Page 156

MCU 16BIT 256KB FLASH 144-PQFP

ST10F272Z2Q3

Manufacturer Part Number
ST10F272Z2Q3
Description
MCU 16BIT 256KB FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F272Z2Q3

Core Processor
ST10
Core Size
16-Bit
Speed
64MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-5579

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST10F272Z2Q3
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Manufacturer:
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Electrical characteristics
25.8.3
156/189
Figure 48. Generation mechanisms for the CPU clock
Clock generation modes
Next
generation mode.
Table 70.
1. The external clock input range refers to a CPU clock range of 1...64 MHz. Besides, the PLL usage is limited
2. The maximum depends on the duty cycle of the external clock signal: when 64MHz is used, 50% duty cycle
3. The limits on input frequency are 4-8 MHz since the usage of the internal oscillator amplifier is required.
1
1
1
1
0
0
0
0
to 4-8MHz. All configurations need a crystal (or ceramic resonator) to generate the CPU clock through the
internal oscillator amplifier (apart from Direct Drive): vice versa, the clock can be forced through an external
clock source only in Direct Drive mode (on-chip oscillator amplifier disabled, so no crystal or resonator can
be used).
shall be granted (low phase = high phase = 7.8 ns); when 32 MHz is selected a 25% duty cycle can be
accepted (minimum phase, high or low, again equal to 7.8 ns).
Also when the PLL is not used and the CPU clock corresponds to F
shall be used: it is not possible to force any clock though an external clock source.
(P0H.7-5)
Table 70
P0.15-13
1
1
0
0
1
1
0
0
On-chip clock generator selections
Phase locked loop operation
Direct Clock Drive
Prescaler Operation
associates the combinations of these three bits with the respective clock
1
0
1
0
1
0
1
0
f
f
f
f
f
f
XTAL
CPU
XTAL
CPU
XTAL
CPU
CPU Frequency
f
CPU
F
F
F
F
F
F
F
F
XTAL
XTAL
XTAL
XTAL
XTAL
XTAL
XTAL
= f
XTAL
XTAL
x 10
x 16
x 4
x 3
x 8
x 5
x 1
/ 2
x F
Input Range
External Clock
4 to 6.4 MHz
5.3 to 8 MHz
6.4 to 8 MHz
1 to 64 MHz
4 to 8 MHz
4 to 8 MHz
4 to 8 MHz
4 MHz
1) 3)
XTAL
Default configuration
Direct Drive (oscillator bypassed)
2)
CPU clock via prescaler
/2, an external crystal or resonator
TCL
TCL
TCLTCL
TCLTCL
Notes
ST10F272Z2
3)

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