MCL908QY2CDTE Freescale Semiconductor, MCL908QY2CDTE Datasheet - Page 146

IC MCU 8BIT 1.5K FLASH 16-TSSOP

MCL908QY2CDTE

Manufacturer Part Number
MCL908QY2CDTE
Description
IC MCU 8BIT 1.5K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCL908QY2CDTE

Core Processor
HC08
Core Size
8-Bit
Speed
2MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Development Support
15.3.1.4 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
Transmit and receive baud rates must be identical.
15.3.1.5 Break Signal
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When the monitor receives a break signal,
it drives the PTA0 pin high for the duration of two bits and then echoes back the break signal.
15.3.1.6 Baud Rate
The monitor communication baud rate is controlled by the frequency of the external or internal oscillator
and the state of the appropriate pins as shown in
Table 15-1
bus frequency divided by 256 when using an external oscillator. When using the internal oscillator in
forced monitor mode, the effective baud rate is the bus frequency divided by 206.
15.3.1.7 Commands
The monitor ROM firmware uses these commands:
The monitor ROM firmware echoes each received byte back to the PTA0 pin for error checking. An 11-bit
delay at the end of each command allows the host to send a break character to cancel the command. A
delay of two bit times occurs before each echo and before READ, IREAD, or READSP data is returned.
The data returned by a read command appears after the echo of the last byte of the command.
146
READ (read memory)
WRITE (write memory)
IREAD (indexed read)
IWRITE (indexed write)
READSP (read stack pointer)
RUN (run user program)
also lists the bus frequencies to achieve standard baud rates. The effective baud rate is the
Wait one bit time after each echo before sending the next byte.
START
BIT
0
BIT 0
1
2
BIT 1
MISSING STOP BIT
3
MC68HLC908QY/QT Family Data Sheet, Rev. 3
Figure 15-13. Monitor Data Format
Figure 15-14. Break Transaction
4
BIT 2
5
6
BIT 3
7
BIT 4
NOTE
Table
BIT 5
15-1.
2-STOP BIT DELAY BEFORE ZERO ECHO
BIT 6
0
1
BIT 7
2
3
STOP
BIT
4
START
NEXT
5
BIT
6
Freescale Semiconductor
7

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