MCL908QY2CDTE Freescale Semiconductor, MCL908QY2CDTE Datasheet - Page 33

IC MCU 8BIT 1.5K FLASH 16-TSSOP

MCL908QY2CDTE

Manufacturer Part Number
MCL908QY2CDTE
Description
IC MCU 8BIT 1.5K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCL908QY2CDTE

Core Processor
HC08
Core Size
8-Bit
Speed
2MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
MASS — Mass Erase Control Bit
ERASE — Erase Control Bit
PGM — Program Control Bit
2.6.2 FLASH Page Erase Operation
Use the following procedure to erase a page of FLASH memory. A page consists of 64 consecutive bytes
starting from addresses $XX00, $XX40, $XX80, or $XXC0. The 48-byte user interrupt vectors area also
forms a page. Any FLASH memory page can be erased alone.
In applications that require more than 1000 program/erase cycles, use the 4 ms page erase specification
to get improved long-term reliability. Any application can use this 4 ms page erase specification. However,
in applications where a FLASH location will be erased and reprogrammed less than 1000 times, and
speed is important, use the 1 ms page erase specification to get a shorter cycle time.
Freescale Semiconductor
10. After time, t
1. Set the ERASE bit and clear the MASS bit in the FLASH control register.
2. Read the FLASH block protect register.
3. Write any data to any FLASH location within the address range of the block to be erased.
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Clear the ERASE bit.
8. Wait for a time, t
9. Clear the HVEN bit.
This read/write bit configures the memory for mass erase operation.
This read/write bit configures the memory for erase operation. ERASE is interlocked with the PGM bit
such that both bits cannot be equal to 1 or set to 1 at the same time.
This read/write bit configures the memory for program operation. PGM is interlocked with the ERASE
bit such that both bits cannot be equal to 1 or set to 1 at the same time.
1 = Mass Erase operation selected
0 = Mass Erase operation unselected
1 = Erase operation selected
0 = Erase operation unselected
1 = Program operation selected
0 = Program operation unselected
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order as shown, but other unrelated operations
may occur between the steps.
A page erase of the vector page will erase the internal oscillator trim value
at $FFC0.
RCV
(typical 1 µs), the memory can be accessed in read mode again.
NVS
Erase
NVH
(minimum 10 µs).
(minimum 5 µs).
(minimum 1 ms or 4 ms).
MC68HLC908QY/QT Family Data Sheet, Rev. 3
CAUTION
NOTE
FLASH Memory (FLASH)
33

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