MC908AZ60AMFUE Freescale Semiconductor, MC908AZ60AMFUE Datasheet - Page 146

• Manufacturer Part Number: MC908AZ60AMFUE
• Description: IC MCU FLASH 8.4MHZ 60K 64QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60AMFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-QFP
• Processor Series: HC08AZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.4 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 8
• Operating Supply Voltage: 5 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE, ZK-HC08AX-A, M68EM08AS/AZ60AE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 15 Channel
• Package: 64PQFP
• Family Name: HC08
• Maximum Speed: 8.4 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Configuration Register (CONFIG-1)
LVIRST — LVI Reset Enable Bit
LVIPWR — LVI Power Enable Bit
SSREC — Short Stop Recovery Bit
COPL — COP Long Timeout
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
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LVIRST enables the reset signal from the LVI module. (See
LVIPWR enables the LVI module. (See
SSREC enables the CPU to exit stop mode with a delay of 32 CGMXCLK cycles instead of a
4096-CGMXCLK cycle delay. (See
COPL enables the shorter COP timeout period. (See
(COP)).
STOP enables the STOP instruction.
COPD disables the COP module. (See
1 = LVI module resets enabled
0 = LVI module resets disabled
1 = LVI module power enabled
0 = LVI module power disabled
1 = Stop mode recovery after 32 CGMXCLK cycles
0 = Stop mode recovery after 4096 CGMXCLK cycles
1 = COP timeout period is 2
0 = COP timeout period is 2
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
If using an external crystal oscillator, do not set the SSREC bit.
Extra care should be exercised when using this emulation part for
development of code to be run in ROM AZ, AB or AS parts that the
options selected by setting the CONFIG-1 register match exactly the
options selected on any ROM code request submitted. The
enable/disable logic is not necessarily identical in all parts of the AS
and AZ families. If in doubt, check with your local field applications
representative.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
13
18
– 2
– 2
9.6.2 Stop
4
4
CGMXCLK cycles
CGMXCLK cycles
Chapter 15 Computer Operating Properly
Chapter 16 Low-Voltage Inhibit
WARNING
NOTE
Mode).
Chapter 15 Computer Operating Properly
Chapter 16 Low-Voltage Inhibit
(LVI)).
Freescale Semiconductor
(COP)).
(LVI)).