MC908AZ60AMFUE Freescale Semiconductor, MC908AZ60AMFUE Datasheet - Page 393

• Manufacturer Part Number: MC908AZ60AMFUE
• Description: IC MCU FLASH 8.4MHZ 60K 64QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60AMFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-QFP
• Processor Series: HC08AZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.4 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 8
• Operating Supply Voltage: 5 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE, ZK-HC08AX-A, M68EM08AS/AZ60AE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 15 Channel
• Package: 64PQFP
• Family Name: HC08
• Maximum Speed: 8.4 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Addr.
Analog-to-Digital Data Register
Timer B Counter Register High
Timer B Counter Register Low
Timer B Modulo Register High
Timer B Modulo Register Low
Analog-to-Digital Input Clock
Timer B CH0 Register High
Timer B CH1 Register High
Timer B Status and Control
Timer B CH0 Register Low
Timer B CH1 Register Low
PIT Counter Register High
PIT Counter Register Low
Control Register (TBSC0)
Control Register (TBSC1)
PIT Modulo Register High
PIT Modulo Register Low
Timer B CH0 Status and
Timer B CH1 Status and
Register Name
PIT Status and Control
Register (ADICLK)
Register (TBSCR)
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Figure B-2. I/O Data, Status and Control Registers (Sheet 4 of 4)
Register (PSC)
(TBMODH)
(TBMODL)
(TBCNTH)
(TBCH0H)
(TBCH1H)
(TBCNTL)
(TBCH0L)
(TBCH1L)
(PMODH)
(PMODL)
(PCNTH)
(PCNTL)
(ADR)
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
ADIV2
CH0F
CH1F
Bit 15
Bit 15
Bit 15
Bit 15
Bit 15
Bit 15
Bit 7
AD7
TOF
Bit 7
Bit 7
Bit 7
Bit 7
POF
Bit 7
Bit 7
0
0
0
0
= Unimplemented
CH0IE
CH1IE
ADIV1
TOIE
POIE
AD6
14
14
14
14
14
14
6
6
6
6
6
6
6
TSTOP
PSTOP
ADIV0
MS0B
AD5
13
13
13
13
13
13
5
5
5
5
0
5
5
5
ADICLK
MS0A
MS1A
TRST
PRST
AD4
12
12
12
12
12
12
4
0
4
4
4
4
0
4
4
ELS0B
ELS1B
AD3
11
11
11
11
11
11
R
R
R
3
0
0
3
3
3
3
0
3
3
= Reserved
ELS0A
ELS1A
PPS2
AD2
PS2
10
10
10
10
10
10
R
2
0
2
2
2
2
2
2
TOV0
TOV1
PPS1
AD1
PS1
R
1
0
9
1
9
1
9
1
9
1
9
1
9
1
I/O Section
CH0MAX
CH1MAX
PPS0
Bit 0
AD0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
PS0
R
0
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