PIC16F688-E/ML Microchip Technology, PIC16F688-E/ML Datasheet - Page 378

• Manufacturer Part Number: PIC16F688-E/ML
• Description: IC PIC MCU FLASH 4KX14 16QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-E/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-QFN
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, RS- 232, SCI, USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
• Lead Free Status / Rohs Status: Details

PICmicro MID-RANGE MCU FAMILY
20.6
20.7
DS31020A-page 20-8
Comparator Response Time
Comparator Outputs
Response time is the minimum time, after selecting a new reference voltage or input source,
before the comparator output is guaranteed to have a valid level. If the internal reference is
changed, the maximum settling time of the internal voltage reference must be considered when
using the comparator outputs. Otherwise the maximum response time of the comparators should
be used.
The comparator outputs are read through the CMCON register. These bits are read only. The
comparator outputs may also be directly output to the I/O pins. When CM2:CM0 = 110, multiplex-
ors in the output path of the I/O pins will switch and the output of each pin will be the unsynchro-
nized output of the comparator. The uncertainty of each of the comparators is related to the input
offset voltage and the response time given in the specifications.
ator output block diagram.
The TRIS bits will still function as the output enable/disable for the I/O pins while in this mode.
Figure 20-3: Comparator Output Block Diagram
Note 1: When reading the Port register, all pins configured as analog inputs will read as a
Note 2: Analog levels on any pin that is defined as a digital input may cause the input buffer
‘0’. Pins configured as digital inputs will convert an analog input according to the
Schmitt Trigger input specification.
to consume more current than is specified.
To I/O pin
Set
CMIF
bit
Bus
Data
RD CMCON
From
Other
Comparator
Q
Q
EN
D
CL
EN
D
RESET
Figure 20-3
RD CMCON
1997 Microchip Technology Inc.
MULTIPLEX
Port Pins
+
shows the compar-
-