PIC16F688-E/ML Microchip Technology, PIC16F688-E/ML Datasheet - Page 413

• Manufacturer Part Number: PIC16F688-E/ML
• Description: IC PIC MCU FLASH 4KX14 16QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-E/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-QFN
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, RS- 232, SCI, USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
• Lead Free Status / Rohs Status: Details

22.6
1997 Microchip Technology Inc.
A/D Conversions
Section 22. Basic 8-bit A/D Converter
Example 22-2
inputs. The analog reference (V
conversion clock is F
Clearing the GO/DONE bit during a conversion will abort the current conversion. The ADRES
register will NOT be updated with the partially completed A/D conversion sample. That is, the
ADRES register will continue to contain the value of the last completed conversion (or the last
value written to the ADRES register). After the A/D conversion is aborted, a 2T
before the next acquisition is started. After this 2T
on the selected channel.
Example 22-2:
Figure 22-4:
;
;
;
;
Note:
Ensure that the required sampling time for the selected input
channel has elapsed. Then the conversion may be started.
Set GO bit
BSF
CLRF
BCF
MOVLW
MOVWF
BSF
BSF
BSF
T
AD
:
:
1 T
The GO/DONE bit should NOT be set in the same instruction that turns on the A/D,
due to the required acquisition time.
Holding capacitor is disconnected
from analog input
show how to perform an A/D conversion. The RA pins are configured as analog
A/D Conversion T
AD
b7
STATUS, RP0
ADCON1
STATUS, RP0
0xC1
ADCON0
INTCON, ADIE
INTCON, GIE
ADCON0, GO
Doing an A/D Conversion
2 T
RC
. The conversion is performed on the RA0 channel.
AD
b6
3 T
AD
b5
REF
4 T
AD
; Select Bank1
; Configure A/D inputs
; Select Bank0
; RC Clock, A/D is on, Channel 0 selected
;
; Enable A/D Interrupt
; Enable all interrupts
; Start A/D Conversion
; The ADIF bit will be set and the GO/DONE bit
;
;
) is the device V
Cycles
b4
AD
is cleared upon completion of the
A/D Conversion.
5 T
Holding capacitor is connected to analog input
AD
b3
6 T
AD
DD
wait, an acquisition is automatically started
. The A/D interrupt is enabled, and the A/D
AD
b2
Next Q4: ADRES is loaded
7 T
AD
b1
8 T
GO bit is cleared
ADIF bit is set
b0
AD
9 T
DS31022A-page 22-11
AD
b0
AD
10
wait is required
T
AD
11
22