AT90PWM81-16SN Atmel, AT90PWM81-16SN Datasheet - Page 232

IC MCU AVR 8K FLASH ISP 20SOIC

AT90PWM81-16SN

Manufacturer Part Number
AT90PWM81-16SN
Description
IC MCU AVR 8K FLASH ISP 20SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet

Specifications of AT90PWM81-16SN

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
20-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
16 MHz
Number Of Timers
1
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Height
2.35 mm
Length
13 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
7.6 mm
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM81-16SN
Manufacturer:
Atmel
Quantity:
1 500
19.4
19.5
19.6
19.6.1
20. Boot Loader Support – Read-While-Write Self-Programming
232
Software Break Points
Limitations of debugWIRE
debugWIRE Related Register in I/O Memory
AT90PWM81
debugWire Data Register – DWDR
debugWIRE supports Program memory Break Points by the AVR Break instruction. Setting a Break Point
in AVR Studio
BREAK instruction will be stored. When program execution is continued, the stored instruction will be
executed before continuing from the Program memory. A break can be inserted manually by putting the
BREAK instruction in the program.
The Flash must be re-programmed each time a Break Point is changed. This is automatically handled by
AVR Studio through the debugWIRE interface. The use of Break Points will therefore reduce the Flash
Data retention. Devices used for debugging purposes should not be shipped to end customers.
The debugWIRE communication pin (dW) is physically located on the same pin as External Reset
(RESET). An External Reset source is therefore not supported when the debugWIRE is enabled.
The debugWIRE system accurately emulates all I/O functions when running at full speed, i.e., when the
program in the CPU is running. When the CPU is stopped, care must be taken while accessing some of the
I/O Registers via the debugger (AVR Studio).
A programmed DWEN Fuse enables some parts of the clock system to be running in all sleep modes. This
will increase the power consumption while in sleep. Thus, the DWEN Fuse should be disabled when
debugWire is not used.
The following section describes the registers used with the debugWire.
The DWDR Register provides a communication channel from the running program in the MCU to the
debugger. This register is only accessible by the debugWIRE and can therefore not be used as a general
purpose register in the normal operations.
In AT90PWM81, the Boot Loader Support provides a real Read-While-Write Self-Programming mecha-
nism for downloading and uploading program code by the MCU itself. This feature allows flexible
application software updates controlled by the MCU using a Flash-resident Boot Loader program. The
Boot Loader program can use any available data interface and associated protocol to read code and write
(program) that code into the Flash memory, or read the code from the program memory. The program
Bit
Read/Write
Initial Value
• Pull-up resistors on the dW/(RESET) line must not be smaller than 10kΩ. The pull-up resistor is not
• Connecting the RESET pin directly to V
• Capacitors connected to the RESET pin must be disconnected when using debugWire.
• All external reset sources must be disconnected.
required for debugWIRE functionality.
®
7
DWDR[7:0]
R/W
0
will insert a BREAK instruction in the Program memory. The instruction replaced by the
6
R/W
0
5
R/W
0
CC
4
R/W
0
will not work.
3
R/W
0
2
R/W
0
1
R/W
0
0
R/W
0
7734P–AVR–08/10
DWDR

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