AT90PWM81-16SN Atmel, AT90PWM81-16SN Datasheet - Page 97

• Manufacturer Part Number: AT90PWM81-16SN
• Description: IC MCU AVR 8K FLASH ISP 20SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM81-16SN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Height: 2.35 mm
• Length: 13 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 7.6 mm
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.8.2
11.8.3
11.8.4
7734P–AVR–08/10
Timer/Counter1 – TCNT1H and TCNT1L
Input Capture Register 1 – ICR1H and ICR1L
Timer/Counter1 Interrupt Mask Register – TIMSK1
Table 11-2.
If external pin modes are used for the Timer/Counter1, transitions on the T1 pin will clock the counter
even if the pin is configured as an output. This feature allows software control of the counting.
The two Timer/Counter I/O locations (TCNT1H and TCNT1L, combined TCNT1) give direct access,
both for read and for write operations, to the Timer/Counter unit 16-bit counter. To ensure that both the
high and low bytes are read and written simultaneously when the CPU accesses these registers, the access
is performed using an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by
all the other 16-bit registers.
Modifying the counter (TCNT1) while the counter is running introduces a risk of missing a compare
match between TCNT1 and one of the OCR1x Registers.
Writing to the TCNT1 Register blocks (removes) the compare match on the following timer clock for all
compare units.
The Input Capture is updated with the counter (TCNT1) value each time an event occurs on the ICP1 pin
(or optionally on the Analog Comparator output for Timer/Counter1). The Input Capture can be used for
defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read simultane-
ously when the CPU accesses these registers, the access is performed using an 8-bit temporary High Byte
Register (TEMP). This temporary register is shared by all the other 16-bit registers.
Registers” on page 86.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
CS12
1
1
1
1
CS11
Clock Select Bit Description
0
0
1
1
7
TCNT1[15:8]
TCNT1[7:0]
R/W
0
7
ICR1[15:8]
ICR1[7:0]
R/W
0
7
–
R
0
CS10
6
–
R
0
6
R/W
0
6
R/W
0
0
1
0
1
See “Accessing 16-bit Registers” on page 86.
Description
Reserved
Reserved
External clock source on T1 pin. Clock on falling edge.
External clock source on T1 pin. Clock on rising edge.
5
ICIE1
R/W
0
5
R/W
0
5
R/W
0
4
–
R
0
4
R/W
0
4
R/W
0
3
–
R
0
3
R/W
0
3
R/W
0
R/W
2
–
0
2
R/W
0
2
R/W
0
1
R/W
0
1
R/W
0
1
–
R/W
0
AT90PWM81
See “Accessing 16-bit
0
R/W
0
0
R/W
0
0
TOIE1
R/W
0
TCNT1H
TCNT1L
ICR1H
ICR1L
TIMSK1
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