DSPIC33FJ12MC202-I/ML Microchip Technology, DSPIC33FJ12MC202-I/ML Datasheet - Page 251

• Manufacturer Part Number: DSPIC33FJ12MC202-I/ML
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28QFN EP
• Device Core: dsPIC
• Family Name: dSPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit|6-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 24-35: SPIx MODULE SLAVE MODE (CKE = 1) TIMING REQUIREMENTS
FIGURE 24-18:
© 2009 Microchip Technology Inc.
AC CHARACTERISTICS
SP70
SP71
SP72
SP73
SP30
SP31
SP35
SP40
SP41
SP50
SP51
SP52
SP60
Note 1:
Param
SCLx
SDAx
Note: Refer to Figure 24-1 for load conditions.
No.
2:
3:
4:
TscL
TscH
TdoF
TdoR
TscF
TscR
TscH2doV,
TscL2doV
TdiV2scH,
TdiV2scL
TscH2diL,
TscL2diL
TssL2scH,
TssL2scL
TssH2doZ SSx ↑ to SDO
TscH2ssH
TscL2ssH
TssL2doV SDOx Data Output Valid after
Symbol
These parameters are characterized by similarity, but are not tested in manufacturing.
Data in “Typ” column is at 3.3V, 25°C unless otherwise stated.
The minimum clock period for SCKx is 100 ns. The clock generated in Master mode must not violate this
specification.
Assumes 50 pF load on all SPIx pins.
IM30
SCKx Input Low Time
SCKx Input High Time
SCKx Input Fall Time
SCKx Input Rise Time
SDOx Data Output Fall Time
SDOx Data Output Rise Time
SDOx Data Output Valid after
SCKx Edge
Setup Time of SDIx Data Input
to SCKx Edge
Hold Time of SDIx Data Input
to SCKx Edge
SSx ↓ to SCKx ↓ or SCKx ↑
Input
High-Impedance
SSx ↑ after SCKx Edge
SSx Edge
Condition
I2Cx BUS START/STOP BITS TIMING CHARACTERISTICS (MASTER MODE)
Start
IM31
Characteristic
X
Output
(1)
Preliminary
dsPIC33FJ12MC201/202
1.5 T
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
Min
120
CY
30
30
20
20
10
—
—
—
—
—
—
+ 40
Typ
—
—
10
10
—
—
—
—
—
—
—
—
—
(2)
Max
—
—
25
25
—
—
30
—
—
—
50
—
50
-40°C ≤ T
-40°C ≤ T
IM33
Condition
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Stop
A
A
≤ +125°C for Extended
≤ +85°C for Industrial
IM34
See Note 3
See Note 3
See parameter D032
and Note 3
See parameter D031
and Note 3
See Note 4
DS70265D-page 249
Conditions
—
—
—
—
—
—
—
—