DSPIC33FJ12MC202-I/ML Microchip Technology, DSPIC33FJ12MC202-I/ML Datasheet - Page 282

• Manufacturer Part Number: DSPIC33FJ12MC202-I/ML
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28QFN EP
• Device Core: dsPIC
• Family Name: dSPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit|6-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

d
In-Circuit Emulation........................................................... 201
In-Circuit Serial Programming (ICSP) ....................... 201, 207
Input Capture .................................................................... 143
Input Change Notification.................................................. 114
Instruction Addressing Modes............................................. 44
Instruction Set
Instruction-Based Power-Saving Modes ........................... 107
Internal RC Oscillator
Internet Address................................................................ 285
Interrupt Control and Status Registers................................ 71
Interrupt Setup Procedures ................................................. 97
Interrupt Vector Table (IVT) ................................................ 67
Interrupts Coincident with Power Save Instructions.......... 108
J
JTAG Boundary Scan Interface ........................................ 201
JTAG Interface .................................................................. 207
M
Memory Organization.......................................................... 27
Microchip Internet Web Site .............................................. 285
Modulo Addressing ............................................................. 46
Motor Control PWM........................................................... 149
Motor Control PWM Module
MPLAB ASM30 Assembler, Linker, Librarian ................... 218
MPLAB ICD 2 In-Circuit Debugger.................................... 219
MPLAB ICE 2000 High-Performance Universal
MPLAB Integrated Development Environment Software .. 217
MPLAB PM3 Device Programmer..................................... 219
MPLAB REAL ICE In-Circuit Emulator System................. 219
MPLINK Object Linker/MPLIB Object Librarian ................ 218
N
NVM Module
DS70265D-page 280
s P
Registers ................................................................... 144
File Register Instructions ............................................ 44
Fundamental Modes Supported.................................. 45
MAC Instructions......................................................... 45
MCU Instructions ........................................................ 44
Move and Accumulator Instructions ............................ 45
Other Instructions........................................................ 45
Overview ................................................................... 212
Summary................................................................... 209
Idle ............................................................................ 108
Sleep ......................................................................... 107
Use with WDT ........................................................... 206
IECx ............................................................................ 71
IFSx............................................................................. 71
INTCON1 .................................................................... 71
INTCON2 .................................................................... 71
IPCx ............................................................................ 71
Initialization ................................................................. 97
Interrupt Disable.......................................................... 97
Interrupt Service Routine ............................................ 97
Trap Service Routine .................................................. 97
Applicability ................................................................. 47
Operation Example ..................................................... 46
Start and End Address ................................................ 46
W Address Register Selection .................................... 46
2-Output Register Map................................................ 37
4-Output Register Map................................................ 36
6-Output Register Map................................................ 36
In-Circuit Emulator .................................................... 219
Register Map............................................................... 43
I C
3 3 F
J 1 2 M
C
2 0 1 / 2 0 2
Preliminary
O
Open-Drain Configuration................................................. 114
Output Compare ............................................................... 145
P
Packaging ......................................................................... 261
Peripheral Module Disable (PMD) .................................... 108
PICSTART Plus Development Programmer..................... 220
Pinout I/O Descriptions (table).............................................. 9
PMD Module
PORTA
PORTB
Power-on Reset (POR)....................................................... 64
Power-Saving Features .................................................... 107
Program Address Space..................................................... 27
Program Memory
PWM Time Base............................................................... 152
Q
Quadrature Encoder Interface (QEI)................................. 163
Quadrature Encoder Interface (QEI) Module
R
Reader Response............................................................. 286
Registers
Details....................................................................... 263
Marking ............................................................. 261, 262
Register Map .............................................................. 43
Register Map .............................................................. 42
Register Map for dsPIC33FJ12MC201....................... 42
Register Map for dsPIC33FJ12MC202....................... 42
Clock Frequency and Switching ............................... 107
Construction ............................................................... 49
Data Access from Program Memory
Data Access from Program Memory
Data Access from, Address Generation ..................... 50
Memory Map............................................................... 27
Table Read Instructions
Visibility Operation ...................................................... 52
Interrupt Vector ........................................................... 28
Organization ............................................................... 28
Reset Vector ............................................................... 28
Register Map .............................................................. 37
AD1CHS123 (ADC1 Input Channel 1, 2, 3 Select)... 195
ADxCHS0 (ADCx Input Channel 0 Select ................ 197
ADxCON1 (ADCx Control 1)..................................... 191
ADxCON2 (ADCx Control 2)..................................... 193
ADxCON3 (ADCx Control 3)..................................... 194
ADxCSSL (ADCx Input Scan Select Low) ................ 198
ADxPCFGL (ADCx Port Configuration Low)............. 199
CLKDIV (Clock Divisor) ............................................ 103
CORCON (Core Control) ...................................... 20, 72
DFLTxCON (QEI Control)......................................... 166
I2CxCON (I2Cx Control) ........................................... 175
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 179
I2CxSTAT (I2Cx Status) ........................................... 177
IEC0 (Interrupt Enable Control 0) ............................... 81
IEC1 (Interrupt Enable Control 1) ............................... 83
IEC3 (Interrupt Enable Control 3) ............................... 84
IEC4 (Interrupt Enable Control 4) ............................... 85
IFS0 (Interrupt Flag Status 0) ..................................... 76
Using Program Space Visibility .......................... 52
Using Table Instructions ..................................... 51
TBLRDH ............................................................. 51
TBLRDL.............................................................. 51
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