DSPIC30F4011-20E/PT Microchip Technology, DSPIC30F4011-20E/PT Datasheet - Page 10

• Manufacturer Part Number: DSPIC30F4011-20E/PT
• Description: IC DSPIC MCU/DSP 48K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4011-20E/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (16K x 24)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 30
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 30
• Data Ram Size: 2 KB
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Data Rom Size: 1024 B
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
• Minimum Operating Temperature: - 40 C
• Package: 44TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 9-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F401120EPT

dsPIC30F4011/4012
11. Module: ADC
12. Module: PLL
TABLE 4:
DS80454D-page 10
Up to
750 ksps
Up to
500 ksps
Up to
300 ksps
A/D Speed
ADC event triggers from the INT0 pin will not
wake-up the device from Sleep mode if the SMPI
bits are non-zero. This means that if the ADC is
configured to generate an interrupt after a certain
number of INT0 triggered conversions, the ADC
conversions will not be triggered and the device
will remain in Sleep. The ADC will perform
conversions and wake-up the device only if it is
configured to generate an interrupt after each INT0
triggered conversion (SMPI<3:0> = 0000).
Work around
None. If ADC event trigger from the INT0 pin is
required, initialize SMPI<3:0> to ‘0000’ (interrupt
on every conversion).
Affected Silicon Revisions
If 8x PLL mode is used, the input frequency range
is 5 MHz-10 MHz instead of 4 MHz-10 MHz.
Work around
None. If 8x PLL is used, make sure the input
crystal or clock frequency is 5 MHz or greater.
Affected Silicon Revisions
A1
A1
X
X
A2
A2
X
X
Minimum
153.85 ns
256.41 ns
95.24 ns
10-BIT ADC RATE PARAMETERS
T
A3
A3
X
X
AD
A4
A4
X
X
Sampling
Time Min
2 T
1 T
1 T
AD
AD
AD
dsPIC30F 10-bit ADC Conversion Rates
R
5.0 kΩ
5.0 kΩ
500Ω
S
Max
4.5V to 5.5V
4.5V to 5.5V
3.0V to 5.5V
V
DD
13. Module: ADC
-40°C to +125°C
-40°C to +125°C
-40°C to +85°C
Temperature
The maximum sampling rate for the 10-bit Analog-to-
Digital Conversion module is 750 ksps.
This rate is only achievable when one A/D pin is
being used. Configuring the ADC module to use
multiple sample-and-hold circuits (see device data
sheet), will not improve the conversion speed of
the module.
Table 4 shows the maximum ADC conversion
rates possible using the 10-bit ADC module and
the corresponding module configuration and
operating conditions.
Work around
None.
Affected Silicon Revisions
A1
X
A2
X
A3
X
A/D Channels Configuration
ANx
ANx
ANx or V
ANx
ANx or V
© 2010 Microchip Technology Inc.
A4
X
REF
REF
-
-
S/H
S/H
S/H
CH
CH
CH
X
X
X
V
V
AV
V
AV
REF
REF
REF
or
or
SS
SS
ADC
ADC
ADC
- V
- V
- V
AV
AV
REF
REF
REF
or
or
DD
DD
+
+
+