ST7FLIT10BY0B6 STMicroelectronics, ST7FLIT10BY0B6 Datasheet - Page 96

• Manufacturer Part Number: ST7FLIT10BY0B6
• Description: IC MCU 8BIT 2K FLASH 16-DIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLIT10BY0B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 11
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Processor Series: ST7FLIT1x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 7 Channel
• For Use With: 497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST7LITE1xB
11.5 10-BIT A/D CONVERTER (ADC)
11.5.1 Introduction
The on-chip Analog to Digital Converter (ADC) pe-
ripheral is a 10-bit, successive approximation con-
verter with internal sample and hold circuitry. This
peripheral has up to 7 multiplexed analog input
channels (refer to device pin out description) that
allow the peripheral to convert the analog voltage
levels from up to 7 different sources.
The result of the conversion is stored in a 10-bit
Data Register. The A/D converter is controlled
through a Control/Status Register.
11.5.2 Main Features
■
■
■
Figure 60. ADC Block Diagram
96/159
1
10-bit conversion
Up to 7 channels with multiplexed input
Linear successive approximation
AIN0
AIN6
AIN1
f
CPU
ANALOG
DIV 2
MUX
EOC SPEED ADON
3
ADCDRH
0
1
AMPSEL
x 1 or
x 8
bit
DIV 4
0
R
ADCDRL
ADC
D9
0
CH2
D8
SLOW
■
■
■
The block diagram is shown in
11.5.3 Functional Description
11.5.3.1 Analog Power Supply
V
ence voltage pins. In some devices (refer to device
pin out description) they are internally connected
to the V
Conversion accuracy may therefore be impacted
by voltage drops and noise in the event of heavily
loaded or badly decoupled power supply lines.
bit
1
0
CH1
D7
HOLD CONTROL
DDA
Data register (DR) which contains the results
Conversion complete status flag
On/off bit (to reduce consumption)
0
CH0
and V
D6
DD
0
f
C
ADC
and V
D5
ADC
ADCCSR
SSA
0
D4
are the high and low level refer-
SS
AMP
CAL
ANALOG TO DIGITAL
pins.
D3
SLOW
CONVERTER
D2
AMP
SEL
Figure
D1
60.
D0