ST7FLITE39F2M3TR STMicroelectronics, ST7FLITE39F2M3TR Datasheet - Page 121

• Manufacturer Part Number: ST7FLITE39F2M3TR
• Description: IC MCU 8BIT 8K FLASH 20SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE39F2M3TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: LINSCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SOIC (7.5mm Width)
• For Use With: 497-8406 - BOARD STF20NM50FD/STF7LITE39BF2497-8403 - BOARD DEMO STCC08 AC SW DETECTOR497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.6 10-BIT A/D CONVERTER (ADC)
11.6.1 Introduction
The on-chip Analog to Digital Converter (ADC) pe-
ripheral is a 10-bit, successive approximation con-
verter with internal sample and hold circuitry. This
peripheral has up to 7 multiplexed analog input
channels (refer to device pin out description) that
allow the peripheral to convert the analog voltage
levels from up to 7 different sources.
The result of the conversion is stored in a 10-bit
Data Register. The A/D converter is controlled
through a Control/Status Register.
11.6.2 Main Features
■
■
■
Figure 66. ADC Block Diagram
10-bit conversion
Up to 7 channels with multiplexed input
Linear successive approximation
AIN0
AINx
AIN1
f
CPU
ANALOG
DIV 2
MUX
EOC SPEED ADON
3
ADCDRH
0
1
DIV 4
0
R
ADCDRL
ADC
D9
0
CH2
D8
SLOW
■
■
■
The block diagram is shown in
11.6.3 Functional Description
11.6.3.1 Analog Power Supply
V
ence voltage pins. In some devices (refer to device
pin out description) they are internally connected
to the V
Conversion accuracy may therefore be impacted
by voltage drops and noise in the event of heavily
loaded or badly decoupled power supply lines.
bit
1
0
CH1
D7
HOLD CONTROL
DDA
Data register (DR) which contains the results
Conversion complete status flag
On/off bit (to reduce consumption)
0
CH0
and V
D6
DD
0
f
C
ADC
and V
ADC
D5
ADCCSR
SSA
0
D4
are the high and low level refer-
SS
0
ANALOG TO DIGITAL
pins.
D3
SLOW
CONVERTER
D2
0
Figure
ST7LITE3xF2
D1
66.
D0
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