ST62T60CB6 STMicroelectronics, ST62T60CB6 Datasheet - Page 42

• Manufacturer Part Number: ST62T60CB6
• Description: IC MCU 8BIT W/ADC 20-PDIP
• Manufacturer: STMicroelectronics
• Series: ST6r

Specifications of ST62T60CB6

• Core Processor: ST6
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI
• Peripherals: LED, LVD, POR, WDT
• Number Of I /o: 13
• Program Memory Size: 3.8KB (3.8K x 8)
• Program Memory Type: OTP
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 6 V
• Data Converters: A/D 7x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: ST62T6x
• Core: ST6
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 7-ch x 8-bit
• Controller Family/series: ST6
• No. Of I/o's: 13
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.2 TIMER
The MCU features an on-chip Timer peripheral,
consisting of an 8-bit counter with a 7-bit program-
mable prescaler, giving a maximum count of 2
Figure 26
content of the 8-bit counter can be read/written in
the Timer/Counter register, TCR, which can be ad-
dressed in Data space as a RAM location at ad-
dress 0D3h. The state of the 7-bit prescaler can be
read in the PSC register at address 0D2h. The
control logic device is managed in the TSCR reg-
ister as described in the following paragraphs.
The 8-bit counter is decrement by the output (ris-
ing edge) coming from the 7-bit prescaler and can
be loaded and read under program control. When
it decrements to zero then the TMZ (Timer Zero)bit
in the TSCR is set. If the ETI (Enable Timer Inter-
rupt) bit in the TSCR is also set, an interrupt re-
quest is generated. The Timer interrupt can be
used to exit the MCU from WAIT mode.
Figure 26. Timer Block Diagram
f
INT
shows the Timer Block Diagram. The
12
PSC
6
5
4
3
2
1
0
8
SELECT
1 OF 7
15
ST6253C ST6263C ST6263B ST6260C ST6260B
.
COUNTER
DATA BUS
3
8-BIT
The prescaler input is the internal frequency (f
divided by 12. The prescaler decrements on the
rising edge. Depending on the division factor pro-
grammed by PS2, PS1 and PS0 bits in the TSCR
(see
ter register is multiplexed to different sources. For
division factor 1, the clock input of the prescaler is
also that of timer/counter; for factor 2, bit 0 of the
prescaler register is connected to the clock input of
TCR. This bit changes its state at half the frequen-
cy of the prescaler input clock. For factor 4, bit 1 of
the PSC is connected to the clock input of TCR,
and so forth. The prescaler initialize bit, PSI, in the
TSCR register must be set to allow the prescaler
(and hence the counter) to start. If it is cleared, all
the prescaler bits are set and the counter is inhib-
ited from counting. The prescaler can be loaded
with any value between 0 and 7Fh, if bit PSI is set.
The prescaler tap is selected by means of the
PS2/PS1/PS0 bits in the control register.
Figure 27
8
Figure
illustrates the Timer’s working principle.
TMZ ETI D5
b7 b6 b5
12), the clock input of the timer/coun-
STATUS/CONTROL
REGISTER
D4 PSI PS2 PS1 PS0
b4 b3 b2 b1
8
INTERRUPT
b0
LINE
VR02070A
42/83
INT
)