ST62T60CB6 STMicroelectronics, ST62T60CB6 Datasheet - Page 59

• Manufacturer Part Number: ST62T60CB6
• Description: IC MCU 8BIT W/ADC 20-PDIP
• Manufacturer: STMicroelectronics
• Series: ST6r

Specifications of ST62T60CB6

• Core Processor: ST6
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI
• Peripherals: LED, LVD, POR, WDT
• Number Of I /o: 13
• Program Memory Size: 3.8KB (3.8K x 8)
• Program Memory Type: OTP
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 6 V
• Data Converters: A/D 7x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: ST62T6x
• Core: ST6
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 7-ch x 8-bit
• Controller Family/series: ST6
• No. Of I/o's: 13
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ST6253C ST6263C ST6263B ST6260C ST6260B
5.3 INSTRUCTION SET
The ST6 core offers a set of 40 basic instructions
which, when combined with nine addressing
modes, yield 244 usable opcodes. They can be di-
vided into six different types: load/store, arithme-
tic/logic, conditional branch, control instructions,
jump/call, and bit manipulation. The following par-
agraphs describe the different types.
All the instructions belonging to a given type are
presented in individual tables.
Table 17. Load & Store Instructions
Notes:
X,Y. Indirect Register Pointers, V & W Short Direct Registers
# .
rr.
* .
59/83
LD A, X
LD A, Y
LD A, V
LD A, W
LD X, A
LD Y, A
LD V, A
LD W, A
LD A, rr
LD rr, A
LD A, (X)
LD A, (Y)
LD (X), A
LD (Y), A
LDI rr, #N
.
LDI A, #N
Immediate data (stored in ROM memory)
Data space register
Affected
Not Affected
Instruction
Short Direct
Short Direct
Short Direct
Short Direct
Short Direct
Short Direct
Short Direct
Short Direct
Direct
Direct
Indirect
Indirect
Indirect
Indirect
Immediate
Immediate
Addressing Mode
Load & Store. These instructions use one, two or
three bytes in relation with the addressing mode.
One operand is the Accumulator for LOAD and the
other operand is obtained from data memory using
one of the addressing modes.
For Load Immediate one operand can be any of
the 256 data space bytes while the other is always
immediate data.
Bytes
1
1
1
1
1
1
1
1
2
2
1
1
1
1
2
3
Cycles
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
Z
*
Flags
C
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*