Z8F3221PM020SG Zilog, Z8F3221PM020SG Datasheet - Page 130

• Manufacturer Part Number: Z8F3221PM020SG
• Description: IC ENCORE MCU FLASH 32K 40DIP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F3221PM020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.620", 15.75mm)
• Processor Series: Z8F322x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 29
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: Z8F64200100KITG, ZENETSC0100ZACG, ZUSBSC00100ZACG, Z8F64210100ZDA, Z8F64210100ZDP, Z8F64210100ZDV, Z8F64220100ZDA, Z8F64220100ZDV, Z8F6422AR00ZEM, Z8F6422VS00ZEM, Z8F6421AN00ZEM
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4257; Z8F3221PM020SG

Table 58. UART Address Compare Register (UxADDR)
PS019918-1206
BITS
FIELD
RESET
R/W
ADDR
UART Address Compare Register
UART Baud Rate High and Low Byte Registers
7
IREN—Infrared Encoder/Decoder Enable
0 = Infrared Encoder/Decoder is disabled. UART operates normally operation.
1 = Infrared Encoder/Decoder is enabled. The UART transmits and receives data
The UART Address Compare register (see
address of the UART. When the MPMD[1] bit of UART Control Register 0 is set, all
incoming address bytes are compared to the value stored in the Address Compare register.
Receive interrupts and RDA assertions only occur in the event of a match.
COMP_ADDR—Compare Address
This 8-bit value is compared to the incoming address bytes.
The UART Baud Rate High and Low Byte registers (see
page 118) combine to create a 16-bit baud rate divisor value (BRG[15:0]) that sets the data
transmission rate (baud rate) of the UART. To configure the Baud Rate Generator as a
timer with interrupt on time-out, complete the following procedure:
1. Disable the UART by clearing the REN and TEN bits in the UART Control 0 register
2. Load the desired 16-bit count value into the UART Baud Rate High and Low Byte
3. Enable the Baud Rate Generator timer function and associated interrupt by setting the
When configured as a general purpose timer, the UART BRG interrupt interval is calcu-
lated using the following equation:
UART BRG Interrupt Interval s ( )
to 0.
registers.
BRGCTL bit in the UART Control 1 register to 1.
through the Infrared Encoder/Decoder.
6
5
=
System Clock Period (s) BRG 15:0
F45H and F4DH
COMP_ADDR
4
R/W
0
Table
3
58) stores the multi-node network
×
Table 59
[
2
]
Z8 Encore!
Product Specification
and
Table 60
1
®
64K Series
on
0
UART
117