MC9S12XET256MAA Freescale Semiconductor, MC9S12XET256MAA Datasheet - Page 259

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MC9S12XET256MAA

Manufacturer Part Number
MC9S12XET256MAA
Description
MCU 16BIT 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XET256MAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
59
Number Of Timers
25
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Package
80PQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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internal RAM and misaligned XGATE PRR accesses in emulation modes are the only type of access that
are able to produce LSTRB = ADDR0 = 1. This is summarized in
Freescale Semiconductor
Word write of data on DATA[15:0] at an even and even+1
address
Byte write of data on DATA[7:0] at an odd address
Byte write of data on DATA[15:8] at an even address
Word write at an odd and odd+1 internal RAM address
(misaligned — only in emulation modes)
Word read of data on DATA[15:0] at an even and even+1
address
Byte read of data on DATA[7:0] at an odd address
Byte read of data on DATA[15:8] at an even address
Word read at an odd and odd+1 internal RAM address
(misaligned - only in emulation modes)
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Table 5-20. Access in Emulation Modes and Special Test Mode
Access
MC9S12XE-Family Reference Manual Rev. 1.23
RW LSTRB ADDR0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
Table
0
1
0
1
0
1
0
1
Chapter 5 External Bus Interface (S12XEBIV4)
Out
Out
Out data(odd+1) Out
I/O
5-20.
In
In
In
In
In
DATA[15:8]
data(odd+1)
data(addr)
data(even)
data(even)
data(even)
data(odd)
x
x
Out
Out
I/O
In
In
In
In
In
DATA[7:0]
data(even+1)
data(addr)
data(odd)
data(odd)
data(odd)
data(odd)
data(odd)
x
x
259

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