MC56F8346VFVER2 Freescale Semiconductor, MC56F8346VFVER2 Datasheet - Page 122

• Manufacturer Part Number: MC56F8346VFVER2
• Description: IC HYBRID CTRLR 16BIT 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8346VFVER2

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 62
• Program Memory Size: 136KB (68K x 16)
• Program Memory Type: FLASH
• Ram Size: 6K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.5.9.4
Each bit controls clocks to the indicated peripheral.
6.5.9.5
Each bit controls clocks to the indicated peripheral.
6.5.9.6
Each bit controls clocks to the indicated peripheral.
6.5.9.7
Each bit controls clocks to the indicated peripheral.
6.5.9.8
Each bit controls clocks to the indicated peripheral.
6.5.9.9
Each bit controls clocks to the indicated peripheral.
6.5.9.10
Each bit controls clocks to the indicated peripheral.
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0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
FlexCAN Enable (CAN)—Bit 12
Decoder 1 Enable (DEC1)—Bit 11
Decoder 0 Enable (DEC0)—Bit 10
Quad Timer D Enable (TMRD)—Bit 9
Quad Timer C Enable (TMRC)—Bit 8
Quad Timer B Enable (TMRB)—Bit 7
Quad Timer A Enable (TMRA)—Bit 6
56F8346 Technical Data, Rev. 15
Freescale Semiconductor
Preliminary