MC9S12XDT256MAA Freescale Semiconductor, MC9S12XDT256MAA Datasheet - Page 555

IC MCU 256K FLASH 80-QFP

MC9S12XDT256MAA

Manufacturer Part Number
MC9S12XDT256MAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256MAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
16KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 14
Voltage Regulator (S12VREG3V3V5)
14.1
Module VREG_3V3 is a dual output voltage regulator that provides two separate 2.5V (typical) supplies
differing in the amount of current that can be sourced. The regulator input voltage range is from 3.3V up
to 5V (typical).
14.1.1
Module VREG_3V3 includes these distinctive features:
14.1.2
There are three modes VREG_3V3 can operate in:
Freescale Semiconductor
1. Full performance mode (FPM) (MCU is not in stop mode)
2. Reduced power mode (RPM) (MCU is in stop mode)
3. Shutdown mode
Two parallel, linear voltage regulators
— Bandgap reference
Low-voltage detect (LVD) with low-voltage interrupt (LVI)
Power-on reset (POR)
Low-voltage reset (LVR)
Autonomous periodical interrupt (API)
The regulator is active, providing the nominal supply voltage of 2.5 V with full current sourcing
capability at both outputs. Features LVD (low-voltage detect), LVR (low-voltage reset), and POR
(power-on reset) are available. The API is available.
The purpose is to reduce power consumption of the device. The output voltage may degrade to a
lower value than in full performance mode, additionally the current sourcing capability is
substantially reduced. Only the POR is available in this mode, LVD and LVR are disabled. The API
is available.
Controlled by VREGEN (see device level specification for connectivity of VREGEN).
This mode is characterized by minimum power consumption. The regulator outputs are in a
high-impedance state, only the POR feature is available, LVD and LVR are disabled. The API
internal RC oscillator clock is not available.
This mode must be used to disable the chip internal regulator VREG_3V3, i.e., to bypass the
VREG_3V3 to use external supplies.
Introduction
Features
Modes of Operation
MC9S12XDP512 Data Sheet, Rev. 2.21
555

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