UPD78F0551MA-FAA-AX Renesas Electronics America, UPD78F0551MA-FAA-AX Datasheet - Page 331

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UPD78F0551MA-FAA-AX

Manufacturer Part Number
UPD78F0551MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0551MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2-L
(1) 8-bit timer counter 5n (TM5n)
(2) 8-bit timer compare register 5n (CR5n)
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
TM5n is an 8-bit register that counts the count pulses and is read-only.
The counter is incremented in synchronization with the rising edge of the count clock.
In the following situations, the count value is cleared to 00H.
<1> Reset signal generation
<2> When TCE5n is cleared
<3> When TM5n and CR5n match in the mode in which clear & start occurs upon a match of the TM5n and CR5n.
CR5n can be read and written by an 8-bit memory manipulation instruction.
Except in PWM mode, the value set in CR5n is constantly compared with the 8-bit timer counter 5n (TM5n) count
value, and an interrupt request (INTTM5n) is generated if they match.
In the PWM mode, TO5n output becomes inactive when the values of TM5n and CR5n match, but no interrupt is
generated.
The value of CR5n can be set within 00H to FFH.
Reset signal generation clears CR5n to 00H.
Cautions 1. In the mode in which clear & start occurs on a match of TM5n and CR5n (TMC5n6 = 0), do not
Remark 78K0/KY2-L, 78K0/KA2-L: n = 1
2. In PWM mode, make the CR5n rewrite period 3 count clocks of the count clock (clock selected
78K0/KB2-L, 78K0/KC2-L: n = 0, 1
Address: FF16H (TM50), FF1FH (TM51)
Address: FF17H (CR50), FF41H (CR51)
Symbol
Symbol
write other values to CR5n during operation.
by TCL5n) or more.
TM5n
CR5n
Figure 7-6. Format of 8-Bit Timer Compare Register 5n (CR5n)
Figure 7-5. Format of 8-Bit Timer Counter 5n (TM5n)
CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51
After reset: 00H
After reset: 00H
R/W
R
317

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