UPD78F0551MA-FAA-AX Renesas Electronics America, UPD78F0551MA-FAA-AX Datasheet - Page 690

• Manufacturer Part Number: UPD78F0551MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0551MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
78K0/Kx2-L
(3) Port mode register 12 (PM12) (78K0/KB2-L and 78K0/KC2-L only)
22.4 Operation of Low-Voltage Detector
(1) Used as reset (LVIMD = 1)
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
The low-voltage detector can be used in the following two modes.
When using the P120/EXLVI/INTP0 pin for external low-voltage detection potential input, set PM120 to 1. At this time,
the output latch of P120 may be 0 or 1.
PM12 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to FFH.
• If LVISEL = 0, compares the supply voltage (V
• If LVISEL = 1, compares the input voltage from external input pin (EXLVI) and LVI detection voltage (V
signal when V
generates an internal reset signal when EXLVI < V
Remarks 1. The low-voltage detector (LVI) can be set to ON by an option byte by default. If it is set to ON to
Address: FF2CH
Symbol
PM12
Figure 22-4. Format of Port Mode Register 12 (PM12) (78K0/KB2-L and 78K0/KC2-L only)
2. Level detection of input voltage from external input pin (EXLVI) is available only in 78K0/KB2-L and
PM120
raise the power supply from the POC detection voltage (V
reset signal is generated when the supply voltage (V
78K0/KC2-L.
DD
0
1
< V
7
1
LVI
After reset: FFH
, and releases internal reset when V
Output mode (output buffer on)
Input mode (output buffer off)
6
1
R/W
5
1
DD
P120 pin I/O mode selection
EXLVI
) and LVI detection voltage (V
4
1
, and releases internal reset when EXLVI ≥ V
DD
≥ V
CHAPTER 22 LOW-VOLTAGE DETECTOR
3
1
LVI
DD
.
) < detection voltage (V
POR
2
1
= 1.61 V (TYP.)) or lower, the internal
LVI
), generates an internal reset
1
1
LVI
= 1.91 V ±0.1 V).
PM120
0
EXLVI
.
EXLVI
676
),