UPD78F0555MA-FAA-AX Renesas Electronics America, UPD78F0555MA-FAA-AX Datasheet

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UPD78F0555MA-FAA-AX

Manufacturer Part Number
UPD78F0555MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0555MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
8
78K0/Kx2-L
8-Bit Single-Chip Microcontrollers
www.renesas.com
All information contained in these materials, including products and product specifications,
represents information on the product at the time of publication and is subject to change by
Renesas Electronics Corp. without notice. Please review the latest information published by
Renesas Electronics Corp. through various means, including the Renesas Electronics Corp.
website (http://www.renesas.com).
User’s Manual: Hardware
Rev.4.00
Sep 2010

Related parts for UPD78F0555MA-FAA-AX

UPD78F0555MA-FAA-AX Summary of contents

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Single-Chip Microcontrollers All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the ...

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All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...

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VOLTAGE APPLICATION WAVEFORM AT INPUT PIN: reflected wave may cause malfunction. (MAX) and VIH (MIN) due to noise, etc., the device may malfunction. from entering the device when the input level is fixed, and also in the transition period ...

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Readers This manual is intended for user engineers who wish to understand the functions of the 78K0/Kx2-L microcontrollers and design and develop application systems and programs for these devices. The target products are as follows. • 78K0/KY2-L: • 78K0/KA2-L: • ...

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Conventions Data significance: Active low representations: ××× (overscore over pin and signal name) Note: Caution: Remark: Numerical representations: Binary <R> Related Documents The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as ...

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Documents Related to Development Tools (Software) RA78K0 Ver.3.80 Assembler Package User’s Manual 78K0 Assembler Package RA78K0 Ver.4.01 Operating Precautions (Notification Document) CC78K0 Ver.3.70 C Compiler User’s Manual 78K0 C Compiler CC78K0 Ver. 4.00 Operating Precautions (Notification Document) SM+ System Simulator ...

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CHAPTER 1 OUTLINE............................................................................................................................... 1 1.1 Features........................................................................................................................................... 1 1.2 Ordering Information...................................................................................................................... 4 1.3 Pin Configuration (Top View) ........................................................................................................ 6 1.3.1 78K0/KY2-L....................................................................................................................................... 6 1.3.2 78K0/KA2-L....................................................................................................................................... 7 1.3.3 78K0/KB2-L..................................................................................................................................... 11 1.3.4 78K0/KC2-L..................................................................................................................................... 12 1.4 Block Diagram .............................................................................................................................. 18 1.4.1 78K0/KY2-L..................................................................................................................................... 18 1.4.2 78K0/KA2-L..................................................................................................................................... ...

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Relative addressing....................................................................................................................... 106 3.3.2 Immediate addressing ................................................................................................................... 107 3.3.3 Table indirect addressing .............................................................................................................. 108 3.3.4 Register addressing ...................................................................................................................... 109 3.4 Operand Address Addressing .................................................................................................. 109 3.4.1 Implied addressing ........................................................................................................................ 109 3.4.2 Register addressing ...................................................................................................................... 110 3.4.3 Direct addressing .......................................................................................................................... ...

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Example of controlling subsystem clock........................................................................................ 226 5.6.4 Example of controlling internal low-speed oscillation clock ........................................................... 228 5.6.5 Clocks supplied to CPU and peripheral hardware ......................................................................... 229 5.6.6 CPU clock status transition diagram.............................................................................................. 230 5.6.7 Condition before changing CPU clock ...

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CHAPTER 9 WATCHDOG TIMER ....................................................................................................... 363 9.1 Functions of Watchdog Timer................................................................................................... 363 9.2 Configuration of Watchdog Timer ............................................................................................ 364 9.3 Register Controlling Watchdog Timer...................................................................................... 365 9.4 Operation of Watchdog Timer................................................................................................... 366 9.4.1 Controlling operation of watchdog timer ........................................................................................ 366 9.4.2 ...

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CHAPTER 14 SERIAL INTERFACE UART6 ...................................................................................... 446 14.1 Functions of Serial Interface UART6 ...................................................................................... 446 14.2 Configuration of Serial Interface UART6................................................................................ 451 14.3 Registers Controlling Serial Interface UART6....................................................................... 454 14.4 Operation of Serial Interface UART6 ...................................................................................... 465 14.4.1 Operation stop ...

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Registers Controlling Interrupt Functions............................................................................. 596 17.4 Interrupt Servicing Operations ............................................................................................... 629 17.4.1 Maskable interrupt acknowledgment ........................................................................................... 629 17.4.2 Software interrupt request acknowledgment ............................................................................... 631 17.4.3 Multiple interrupt servicing........................................................................................................... 632 17.4.4 Interrupt request hold .................................................................................................................. 635 CHAPTER 18 KEY INTERRUPT ...

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CHAPTER 25 FLASH MEMORY .......................................................................................................... 699 25.1 Internal Memory Size Switching Register .............................................................................. 699 25.2 Writing with Flash Memory Programmer ............................................................................... 700 25.3 Programming Environment ..................................................................................................... 701 25.4 Connection of Pins on Board.................................................................................................. 702 25.4.1 TOOL pins................................................................................................................................... 702 25.4.2 RESET ...

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CHAPTER 30 RECOMMENDED SOLDERING CONDITIONS........................................................... 777 CHAPTER 31 CAUTIONS FOR WAIT................................................................................................. 778 31.1 Cautions for Wait...................................................................................................................... 778 31.2 Peripheral Hardware That Generates Wait ............................................................................ 779 APPENDIX A DEVELOPMENT TOOLS............................................................................................... 780 A.1 Software Package ...................................................................................................................... 783 A.2 Language Processing Software ............................................................................................... ...

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RENESAS MCU 1.1 Features 78K0 CPU core I/O ports, ROM and RAM capacities Item Products 78K0/KY2-L (16 pins) 78K0/KA2-L (20 pins) <R> 78K0/KA2-L (25 pins) <R> 78K0/KA2-L (32 pins) 78K0/KB2-L (30 pins) <R> 78K0/KC2-L (40 pins) 78K0/KC2-L (44 pins) ...

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Timer • 16-bit timer/event counter … PPG output, capture input, external event counter input • 8-bit timer H … • 8-bit timer/event counter 5 … PWM output, external event counter input • Watchdog timer … • Real-time counter … ...

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On-chip debug function …Available to control for the target device, and to reference memory Assembler and C language supported Development tools • Support for full-function emulator (IECUBE), and simplified emulator (MINICUBE2) Power supply voltage 1.8 to 5.5 ...

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Ordering Information <R> [Part Number] μ PD78F05 x y ΔΔ - ××× -AX Product Type F Flash memory version [Example of Part Number] μ PD78F05 5 0 MA-FAA -AX R01UH0028EJ0400 Rev.4.00 Sep 27, 2010 Semiconductor -AX Lead- Product ...

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Part Number] 78K0/Kx2-L Package Microcontrollers 78K0/KY2-L 16-pin plastic SSOP (5.72 mm (225)) 78K0/KA2-L 20-pin plastic SSOP (7.62 mm (300)) 25-pin plastic FLGA (3x3) 32-pin plastic WQFN (5x5) 78K0/KB2-L 30-pin plastic SSOP (7.62 mm (300)) 78K0/KC2-L 40-pin plastic ...

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Pin Configuration (Top View) 1.3.1 78K0/KY2-L • 16-pin plastic SSOP (5.72 mm (225)) P60/SCLA0/TxD6 P61/SDAA0/RxD6 RESET/P125 P122/X2/EXCLK/TOOLD0 P121/X1/TOOLC0 REGC Note Note AMP0- , AMP0+ : Note AMP0OUT : Note PGAIN : ANI0 to ANI3 ...

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SSOP (7.62 mm (300)) ANI5/P25 ANI4/P24 P60/SCLA0/TxD6 P61/SDAA0/RxD6 RESET/P125 P122/X2/EXCLK/TOOLD0 P121/X1/TOOLC0 REGC Note Note AMP0- , AMP0+ : Note AMP0OUT : Note PGAIN : ANI0 to ANI5 : AV : ...

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FLGA (3x3) (1/2) <R> INDEX MARK REGC C P35/SCK11 D P33 E P34/INTP4 (/TOH1)(/TI51) Note Note AMP0- , AMP0+ Note AMP0OUT Note PGAIN ANI0 to ANI6 AV REF EXCLK INTP0, ...

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FLGA (3x3) (2/2) μ Note PD78F0565, 78F0566, 78F0567 (products with operational amplifier) only Cautions 1. V functions alternately as the ground potential of the A/D converter. Be sure to connect stabilized GND (= ...

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WQFN (5x5) (2/2) <R> Note Note AMP0- , AMP0+ Note AMP0OUT Note PGAIN ANI0 to ANI10 AV REF AV SS EXCLK IC0 INTP0, INTP2 to INTP5 : External Interrupt Input P01, P02 P20 to P27 P31 ...

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SSOP (7.62 mm (300)) ANI1/P21/AMP0OUT ANI0/P20/AMP0- P01/TI010/TO00 P120/INTP0/EXLVI P122/X2/EXCLK/TOOLD0 P121/X1/TOOLC0 P60/SCLA0/INTP11 P61/SDAA0/INTP10 P33/TI51/TO51/INTP4 Note Note AMP0- , AMP0+ , Note Note AMP1- , AMP1+ : Amplifier Input Note AMP0OUT , Note AMP1OUT : Amplifier ...

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WQFN (6x6) (1/2) <R> P120/INTP0/EXLVI RESET/P125 P124/XT2/EXCLKS P123/XT1 IC P122/X2/EXCLK/TOOLD0 P121/X1/TOOLC0 REGC μ Note PD78F0586, 78F0587, 78F0588 (products with operational amplifier) only Cautions 1. Leave the IC (Internally Connected) pin ...

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WQFN (6x6) (2/2) <R> Note Note AMP0- , AMP0+ , Note Note AMP1- , AMP1+ , Note AMP0OUT , Note AMP1OUT Note PGAIN ANI0 to ANI6, ANI8 to ANI10 : Analog Input AV REF AV SS ...

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LQFP (10x10) (1/2) P41/RTC1HZ(/SI11) P40/RTCCL/RTCDIV(/SCK11) RESET/P125 P124/XT2/EXCLKS P123/XT1 IC P122/X2/EXCLK/TOOLD0 P121/X1/TOOLC0 REGC μ Note PD78F0586, 78F0587, 78F0588 (products with operational amplifier) only Cautions 1. Leave the IC (Internally Connected) pin open. 2. ...

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LQFP (10x10) (2/2) Note Note AMP0- , AMP0+ , Note Note AMP1- , AMP1+ : Amplifier Input Note AMP0OUT , Note AMP1OUT : Amplifier Output Note PGAIN : Programmable Gain Amplifier Input ANI0 to ANI10 : ...

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LQFP (fine pitch) (7x7) (1/2) P60/SCLA0/SCK11/INTP11 P61/SDAA0/SI11/INTP10 P62/SO11/INTP9 P63/INTP8 P33/TI51/TO51/INTP4 P75/KR5 P74/KR4 P73/KR3 P72/KR2 P71/KR1 P70/KR0 P32/INTP3/TOOLD1 μ Note PD78F0586, 78F0587, 78F0588 (products with operational amplifier) only Cautions 1. Leave the IC (Internally Connected) pin open. ...

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LQFP (fine pitch) (7x7) (2/2) Note Note AMP0- , AMP0+ , Note Note AMP1- , AMP1+ : Amplifier Input Note AMP0OUT , Amplifier Output Note AMP1OUT : Note PGAIN : Programmable Gain Amplifier Input ANI0-ANI10 : ...

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Block Diagram 1.4.1 78K0/KY2-L TO00/TI010/P01 16-bit TIMER/ EVENT COUNTER 00 TI000/P00 RxD6/P61<LINSEL> TI51/P30 8-bit TIMER 51 TOH1/P30 8-bit TIMER H1 LOW-SPEED OSCILLATOR WATCHDOG TIMER SERIAL RxD6/P61 INTERFACE UART6 TxD6/P60 SDAA0/P61 SERIAL INTERFACE IICA SCLA0/P60 AV REF A/D CONVERTER ...

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TO00/TI010/P01 16-bit TIMER/ EVENT COUNTER 00 TI000/P00 RxD6/P61<LINSEL> TI51/P30 8-bit TIMER 51 TOH1/P30 8-bit TIMER H1 LOW-SPEED OSCILLATOR WATCHDOG TIMER SERIAL RxD6/P61 INTERFACE UART6 TxD6/P60 SDAA0/P61 SERIAL INTERFACE IICA SCLA0/P60 AV REF A/D CONVERTER ...

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TI000/P00 16-bit TIMER/ (TI000)/P121 EVENT COUNTER 00 RxD6/P61<LINSEL> 8-bit TIMER/ (TI51)/P00 EVENT COUNTER 51 (TI51)/P34 (TOH1)/P00 (TOH1)/P34 WATCHDOG TIMER SERIAL RxD6/P61 INTERFACE UART6 TxD6/P60 SDAA0/P61 SERIAL INTERFACE IICA SCLA0/P60 SCK11/P35 SERIAL SI11/P36 INTERFACE CSI11 SO11/P37 ...

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TO00/TI010/P01 16-bit TIMER/ (TI000)/P121 EVENT COUNTER 00 (TI000)/P125 RxD6/P61<LINSEL> 8-bit TIMER/ EVENT COUNTER 51 (TOH1)/P34 WATCHDOG TIMER SERIAL RxD6/P61 INTERFACE UART6 TxD6/P60 SDAA0/P61 SERIAL INTERFACE IICA SCLA0/P60 SCK11/P35 SERIAL SI11/P36 INTERFACE CSI11 SO11/P37 AV REF ...

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TO00/TI010/P01 16-bit TIMER/ EVENT COUNTER 00 TI000/P00 RxD6/P14<LINSEL> 8-bit TIMER/ TI50/TO50/P17 EVENT COUNTER 50 8-bit TIMER/ TI51/TO51/P33 EVENT COUNTER 51 TOH0/P15 8-bit TIMER H0 TOH1/P16 8-bit TIMER H1 INTERNAL LOW-SPEED OSCILLATOR WATCHDOG TIMER SERIAL RxD6/P14 INTERFACE UART6 ...

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TO00/TI010/P01 TI000/P00 RxD6/P14 <LINSEL> TI50/TO50/P17 TI51/TO51/P33 TOH0/P15 TOH1/P16 Note 3 Note 3 Note 3 RTCCL /RTCDIV /P40 Note 3 Note 3 RTC1HZ /P41 RxD6/P14 TxD6/P13 SDAA0/P61 SCLA0/P60 SCK10/P10 SI10/P11 SO10/P12 SCK11/P60 (SCK11/) P40 SI11/P61 (SI11/) P41 ...

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Outline of Functions <R> Item Internal Flash memory memory (self-programming supported ) 384 bytes to 768 bytes High-Speed RAM Memory space 64 KB High-speed system MHz: V (crystal/ceramic oscillation, external ...

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Item 78K0/KY2-L μ ( PD78F055x) Serial UART 1 ch interface IICA 1 ch CSI 10-bit A/D converter 4 ch (AV = 1.8 to 5.5 V) REF Operational amplifier (Products with operational amplifier) Vectored interrupt External ...

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Pin Function List There are two types of pin I/O buffer power supplies: AV and the pins is shown below Note <R> <R> <R> R01UH0028EJ0400 Rev.4.00 Sep 27, 2010 CHAPTER 2 PIN FUNCTIONS and V REF ...

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Port functions: 78K0/KY2-L Function Name I/O P00 I/O Port 0. 2-bit I/O port. P01 Input/output can be specified in 1-bit units. Use of an on-chip pull-up resistor can be specified by a software setting. P20 I/O ...

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Non-port functions : 78K0/KY2-L Function Name I/O ANI0 Input A/D converter analog input ANI1 ANI2 ANI3 Note AMP0- Input Operational amplifier 0 input Note AMP0+ Note AMP0OUT Output Operational amplifier 0 output Note PGAIN Input PGA (programmable gain ...

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Port functions: 78K0/KA2-L (20 pins) Function Name I/O P00 I/O Port 0. 2-bit I/O port. P01 Input/output can be specified in 1-bit units. Use of an on-chip pull-up resistor can be specified by a software setting. ...

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Non-port functions: 78K0/KA2-L (20 pins) (2/2) Function Name I/O Note AMP0- Input Operational amplifier 0 input Note AMP0+ Note AMP0OUT Output Operational amplifier 0 output Note PGAIN Input PGA (programmable gain amplifier) input INTP0 Input External interrupt request ...

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Port functions: 78K0/KA2-L (25, 32 pins) <R> Function Name I/O Note 1 P00 I/O Port 0. 2-bit I/O port. Input/output can be specified in 1-bit units. Note 2 P01 Use of an on-chip pull-up resistor can be specified ...

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Non-port functions: 78K0/KA2-L (25, 32 pins) (1/2) <R> Function Name I/O ANI0 Input A/D converter analog input ANI1 ANI2 ANI3 to ANI6 Note 2 ANI7 Note 2 ANI8 Note 2 ANI9 Note 2 ANI10 Note 3 AMP0- Input ...

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Non-port functions: 78K0/KA2-L (25, 32 pins) (2/2) <R> Function Name I/O SCK11 I/O Clock input/output for CSI10 SI11 Input Serial data input to CSI10 SO11 Output Serial data output from CSI10 SSI11 Input Chip select input to CSI11 ...

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Port functions: 78K0/KB2-L Function Name I/O P00 I/O Port 0. 2-bit I/O port. P01 Input/output can be specified in 1-bit units. Use of an on-chip pull-up resistor can be specified by a software setting. P10 I/O ...

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Non-port functions: 78K0/KB2-L (1/2) Function Name I/O ANI0 Input A/D converter analog input ANI1 ANI2 ANI3 ANI8 ANI9 ANI10 Note AMP0- Input Operational amplifier 0 input Note AMP0+ Note AMP1- Operational amplifier 1 input Note AMP1+ Note AMP0OUT ...

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Non-port functions: 78K0/KB2-L (2/2) Function Name I/O SCK10 I/O Clock input/output for CSI10 SI10 Input Serial data input to CSI10 SO10 Output Serial data output from CSI10 TI000 Input External count clock input to 16-bit timer/event counter 00 ...

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Port functions: 78K0/KC2-L (1/2) Function Name I/O P00 I/O Port 0. 3-bit I/O port. P01 Input/output can be specified in 1-bit units. Note 1 P02 Use of an on-chip pull-up resistor can be specified by ...

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Port functions: 78K0/KC2-L (2/2) Function Name I/O P60 I/O Port 6. 4-bit I/O port. Input/output can be specified in 1-bit units. P61 Input of P60 and P61 can be set to SMBus input buffer in P62 1-bit units. ...

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Non-port functions : 78K0/KC2-L (2/4) <R> Function Name I/O ANI8 Input A/D converter analog input ANI9 ANI10 Note 2 AMP0- Operational amplifier 0 input Note 2 AMP0+ Note 2 AMP1- Operational amplifier 1 input Note 2 AMP1+ Note ...

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Non-port functions : 78K0/KC2-L (3/4) <R> Function Name I/O KR0 to KR3 Input Key interrupt input Note 1 Note 1 KR4 , KR5 Note 1 Clock output (for output of high-speed system clock, PCL Output subsystem clock) Note ...

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Non-port functions: 78K0/KC2-L (4/4) Function Name I/O TI50 Input External count clock input to 8-bit timer/event counter 50 TI51 External count clock input to 8-bit timer/event counter 51 TO00 Output 16-bit timer/event counter 00 output Output TO50 8-bit ...

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Description of Pin Functions Remark The pins mounted depend on the product. Refer to 1.3 Pin Configuration (Top View) and 2.1 Pin Function List. 2.2.1 P00 to P02 (port 0) P00 to P02 function as an I/O port. ...

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SSI11 This is a chip select input pin of serial interface CSI11. 2.2.2 P10 to P17 (port 1) P10 to P17 function as an I/O port. These pins also function as pins for A/D converter analog input, operational ...

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SO10 This is a serial data output pin of serial interface CSI10. (f) SCK10 This is a serial clock I/O pin of serial interface CSI10. (g) RxD6 This is a serial data input pin of serial interface UART6. ...

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Port mode P20 to P27 function as an I/O port. P20 to P27 can be set to input or output port in 1-bit units using port mode register 2 (PM2). (2) Control mode P20 to P27 function as ...

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The following operation modes can be specified in 1-bit units. (1) Port mode P30 to P37 function as an I/O port. P30 to P37 can be set to input or output port in 1-bit units using port mode register ...

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P40 to P42 (port 4) P40 to P42 function as an I/O port. These pins also function as pins for external interrupt request input, real-time counter clock output, real-time counter correction clock output, and chip select input of ...

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SSI11 This is a chip select input pin of serial interface CSI11. 2.2.6 P60 to P63 (port 6) P60 to P63 function as an I/O port. These pins also function as pins for serial interface data I/O, clock ...

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SO11 This is a serial data output pin for serial interface CSI11. (h) INTP8 to INTP11 These are external interrupt request input pins for which the valid edge (rising edge, falling edge, or both rising and falling edges) ...

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P120 to P125 (port 12) P120 functions as an I/O port. P121 to P125 function as an Input port. These pins also function as pins for external interrupt request input, potential input for external low-voltage detection, connecting resonator ...

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INTP0 This functions as an external interrupt request input (INTP0) for which the valid edge (rising edge, falling edge, or both rising and falling edges) can be specified. (b) EXLVI This is a potential input pin for external ...

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REF These are the power supply/ground pins. <R> 78K0/KY2-L μ ( PD78F055x) 16 Pins AV REF − (a) AV REF This is the A/D ...

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REGC This is a pin for connecting regulator output (2.0 V/2.4 V) stabilization capacitance for internal operation. Connect this pin to V via a capacitor (0. operation of the internal high-speed oscillation clock and external ...

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Pin I/O Circuits and Recommended Connection of Unused Pins Tables 2-2 to 2-6 show the types of pin I/O circuits and the recommended connections of unused pins. Refer to Figure 2-1 for the configuration of the I/O circuit ...

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Table 2-3. Pin I/O Circuit Types (78K0/KA2-L (20-pin products)) Pin Name P00/TI000/INTP0 5-AQ P01/TO00/TI010 Note 1 ANI0/P20/AMP0- 11-P Note 1 ANI1/P21/AMP0OUT / 11-O Note 1 <R> PGAIN Note 1 ANI2/P22/AMP0+ 11-N ANI3/P23 11-G ANI4/P24 ANI5/P25 P30/TOH1/TI51/INTP1 5-AQ P31/INTP2/TOOLC1 P32/TOH1/INTP3/TOOLD1 ...

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Table 2-4. Pin I/O Circuit Types (78K0/KA2-L (25-pin and 32-pin products)) <R> Pin Name I/O Circuit Type Note 1 Note 1 P00 /TI000 / 5-AQ Note 1 INTP0 Note 2 Note 2 P01 /TO00 / Note 2 TI010 P02/SSI11/INTP5 ...

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Pin Name P00/TI000 5-AQ P01/TO00/TI010 Note 1 P10/ANI8/ANP1- /SCK10 11-L Note 1 P11/ANI9/ANP1OUT /SI10 11-M Note 1 P12/ANI10/ANP1+ /SO10 11-K P13/TxD6 5-AG P14/RxD6 5-AQ P15/TOH0 5-AG P16/TOH1/INTP5 5-AQ P17/TI50/TO50 Note 1 ANI0/P20/AMP0- 11-P Note 1 ANI1/P21/AMP0OUT / 11-O Note ...

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Pin Name P00/TI000 5-AQ P01/TO00/TI010 Note 1 Note 1 P02 /INTP7 Note 2 P10/ANI8/ANP1- /SCK10 11-L Note 2 P11/ANI9/ANP1OUT /SI10 11-M Note 2 P12/ANI10/ANP1+ /SO10 11-K P13/TxD6 5-AG P14/RxD6 5-AQ P15/TOH0 5-AG P16/TOH1/INTP5 5-AQ P17/TI50/TO50 Note 2 ANI0/P20/AMP0- ...

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Pin Name I/O Circuit Type P60/SCLA0/SCK11/INTP11 5-AS P61/SDAA0/SI11/INTP10 P62/SO11/INTP9 5-AR Note 3 Note 3 P63 /INTP8 P70/KR0 5-AQ P71/KR1 P72/KR2 P73/KR3 Note 1 Note 1 P74 /KR4 Note 1 Note 1 P75 /KR5 P120/EXLVI/INTP0 Note 3 (/SO11) Note ...

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Type 5-AG pullup enable V data output disable V input enable Type 5-AQ pullup enable V data output disable V input enable R01UH0028EJ0400 Rev.4.00 Sep 27, 2010 Figure 2-1. Pin I/O Circuit List (1/4) Type 5- pullup ...

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Type 11-G data output disable P-ch Comparator + _ N-ch Series resistor string voltage AV SS input enable Type 11-K pullup enable data output disable P-ch Comparator + _ N-ch V REF (Threshold voltage input enable + ...

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Type 11-N data output disable P-ch Comparator + _ N-ch V REF (Threshold voltage input enable Type 11-O data output disable P-ch Comparator + _ N-ch V REF (Threshold voltage input enable _ PGA + ...

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R01UH0028EJ0400 Rev.4.00 Sep 27, 2010 Figure 2-1. Pin I/O Circuit List (4/4) Type 42-A V pullup enable input enable SCHMIT reset reset mask CHAPTER 2 PIN FUNCTIONS DD P- ...

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Memory Space Products in the 78K0/Kx2-L microcontrollers can access memory space. Figures 3-1 to 3-4 show the memory maps. Caution Reset signal generation makes the setting of the ROM area undefined. Therefore, set the value ...

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Figure 3-1. Memory Map ( FFFFH Special function registers 256 8 bits FF00H FEFFH General-purpose registers 32 8 bits FEE0H FEDFH Internal high-speed RAM 384 8 bits FD80H FD7FH Data memory space 1000H 0FFFH Program Flash memory memory space ...

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Figure 3-2. Memory Map ( PD78F0551, 78F0556, 78F0561, 78F0566, 78F0571, 78F0576, 78F0581, 78F0586) FFFFH Special function registers 256 FF00H FEFFH General-purpose registers 32 FEE0H FEDFH Internal high-speed RAM 512 FD00H FCFFH Data memory space 2000H 1FFFH Program Flash ...

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Figure 3-3. Memory Map ( PD78F0552, 78F0557, 78F0562, 78F0567, 78F0572, 78F0577, 78F0582, 78F0587) FFFFH Special function registers 256 FF00H FEFFH General-purpose registers FEE0H 32 FEDFH Internal high-speed RAM 768 FC00H FBFFH Data memory space 4000H 3FFFH Program Flash ...

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Figure 3-4. Memory Map ( FFFFH Special function registers 256 FF00H FEFFH General-purpose registers 32 FEE0H FEDFH Internal high-speed RAM 1024 FB00H FAFFH Data memory space Reserved 8000H 7FFFH Program Flash memory memory space 32768 0000H Notes 1. When ...

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Correspondence between the address values and block numbers in the flash memory are shown below. Table 3-2. Correspondence Between Address Values and Block Numbers in Flash Memory Address Value 0000H to 03FFH 0400H to 07FFH 0800H to 0BFFH 0C00H ...

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The internal program memory space is divided into the following areas. (1) Vector table area The 64-byte area 0000H to 003FH is reserved as a vector table area. The program start addresses for branch upon reset or generation of ...

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CALLT instruction table area The 64-byte area 0040H to 007FH can store the subroutine entry address of a 1-byte call instruction (CALLT). (3) Option byte area A 5-byte area of 0080H to 0084H and 1080H to 1084H can ...

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Data memory addressing Addressing refers to the method of specifying the address of the instruction to be executed next or the address of the register or memory relevant to the execution of instructions. Several addressing modes are provided ...

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Figure 3-6. Correspondence Between Data Memory and Addressing μ ( PD78F0551, 78F0556, 78F0561, 78F0566, 78F0571, 78F0576, 78F0581, 78F0586) FFFFH Special function registers (SFR) 256 8 bits FF20H FF1FH FF00H FEFFH General-purpose registers FEE0H 32 8 bits FEDFH Internal high-speed ...

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Figure 3-7. Correspondence Between Data Memory and Addressing μ ( PD78F0552, 78F0557, 78F0562, 78F0567, 78F0572, 78F0577, 78F0582, 78F0587 Special function registers (SFR) 256 x 8 bits ...

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Figure 3-8. Correspondence Between Data Memory and Addressing Special function registers (SFR) 256 8 bits ...

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Processor Registers The 78K0/Kx2-L microcontrollers incorporate the following processor registers. 3.2.1 Control registers The control registers control the program sequence, statuses and stack memory. The control registers consist of a program counter (PC), a program status word (PSW) ...

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Register bank select flags (RBS0 and RBS1) These are 2-bit flags to select one of the four register banks. In these flags, the 2-bit information that indicates the register bank selected by SEL RBn instruction execution is stored. ...

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SP SP (b) CALL, CALLF, CALLT instructions (when SP = FEE0H (c) Interrupt, BRK instructions (when SP = FEE0H R01UH0028EJ0400 Rev.4.00 Sep 27, 2010 Figure 3-12. Data to Be Saved to Stack Memory (a) PUSH ...

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Figure 3-13. Data to Be Restored from Stack Memory (c) RETI, RETB instructions (when SP = FEDDH R01UH0028EJ0400 Rev.4.00 Sep 27, 2010 (a) POP rp instruction (when SP = FEDEH) FEE0H FEE0H FEDFH ...

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General-purpose registers General-purpose registers are mapped at particular addresses (FEE0H to FEFFH) of the data memory. The general- purpose registers consists of 4 banks, each bank consisting of eight 8-bit registers ( ...

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Special function registers (SFRs) Unlike a general-purpose register, each special function register has a special function. SFRs are allocated to the FF00H to FFFFH area. Special function registers can be manipulated like general-purpose registers, using operation, transfer, and ...

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Table 3-6. Special Function Register List: 78K0/KY2-L (1/4) Address Symbol 7 6 FF00H − − − FF01H FF02H FF03H − − − FF04H − − − FF05H FF06H P6 0 ...

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Table 3-6. Special Function Register List: 78K0/KY2-L (2/4) Address Symbol 7 6 FF26H PM6 1 1 − − − FF27H FF28H ADM0 <ADCS> 0 FR2 − − − FF29H FF2AH POM6 0 0 FF2BH FPCTL 0 0 − − ...

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Table 3-6. Special Function Register List: 78K0/KY2-L (3/4) Address Symbol 7 6 FF51H − − − FF52H FF53H ASIS6 0 0 − − − FF54H FF55H ASIF6 0 0 FF56H CKSR6 0 0 FF57H BRGC6 MDL67 MDL66 MDL65 MDL64 ...

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Table 3-6. Special Function Register List: 78K0/KY2-L (4/4) Address Symbol 7 6 FFA7H IICACTL0 <IICE0> <LREL0> <WREL0> <SPIE0> <WTIM0> <ACKE0> <STT0> <SPT0> FFA8H IICACTL1 <WUP> 0 <CLD0> <DAD0> <SMC0> <DFC0> FFA9H IICAF0 <STCF> <IICBSY> FFAAH IICAS0 <MSTS0> <ALD0> <EXC0> ...

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Table 3-7. Special Function Register List: 78K0/KA2-L (20-pin products) (1/4) Address Symbol 7 6 FF00H − − − FF01H FF02H P25 FF03H − − − FF04H − − − FF05H ...

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Table 3-7. Special Function Register List: 78K0/KA2-L (20-pin products) (2/4) Address Symbol 7 6 FF26H PM6 1 1 − − − FF27H FF28H ADM0 <ADCS> 0 FR2 − − − FF29H FF2AH POM6 0 0 FF2BH FPCTL 0 0 ...

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Table 3-7. Special Function Register List: 78K0/KA2-L (20-pin products) (3/4) Address Symbol 7 6 FF51H − − − FF52H FF53H ASIS6 0 0 − − − FF54H FF55H ASIF6 0 0 FF56H CKSR6 0 0 FF57H BRGC6 MDL67 MDL66 ...

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Table 3-7. Special Function Register List: 78K0/KA2-L (20-pin products) (4/4) Address Symbol 7 6 FFA7H IICACTL0 <IICE0> <LREL0> <WREL0> <SPIE0> <WTIM0> <ACKE0> <STT0> <SPT0> FFA8H IICACTL1 <WUP> 0 <CLD0> <DAD0> <SMC0> <DFC0> FFA9H IICAF0 <STCF> <IICBSY> FFAAH IICAS0 <MSTS0> ...

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Table 3-8. Special Function Register List: 78K0/KA2-L (25-pin and 32-pin products) (1/5) Address Symbol FF00H − − − FF01H FF02H P2 P27 P26 Note 2 FF03H P3 P37 P36 − − − FF04H ...

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Table 3-8. Special Function Register List: 78K0/KA2-L (25-pin and 32-pin products) (2/5) <R> Address Symbol 7 6 FF23H PM3 PM37 PM36 − − − FF24H − − − FF25H FF26H PM6 1 1 Note2 FF27H FF28H ...

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Table 3-8. Special Function Register List: 78K0/KA2-L (25-pin and 32-pin products) (3/5) Address Symbol 7 6 − − − FF42H FF43H TMC51 <TCE51> 0 FF44H to − − − FF47H FF48H EGPCTL0 0 0 FF49H EGNCTL0 0 0 ...

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Table 3-8. Special Function Register List: 78K0/KA2-L (25-pin and 32-pin products) (4/5) Address Symbol 7 6 FF8DH to − − − FF98H − − FF99H WDTE FF9AH to − − − FF9EH <EXCL <OSC FF9FH OSCCTL K> SEL> ...

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Table 3-8. Special Function Register List: 78K0/KA2-L (25-pin and 32-pin products) (5/5) Address Symbol 7 6 FFC0H to − − − FFDFH <SREIF6> <PIF5> <PIF4> <PIF3> <PIF2> FFE0H IF0L IF0 FFE1H IF0H <TMIF010> <TMIF000> FFE2H IF1L ...

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Table 3-9. Special Function Register List: 78K0/KB2-L (1/5) Address Symbol 7 6 FF00H FF01H P1 P17 P16 P15 FF02H FF03H − − − FF04H − − − FF05H FF06H P6 ...

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Table 3-9. Special Function Register List: 78K0/KB2-L (2/5) Address Symbol 7 6 FF23H PM3 1 1 − − − FF24H − − − FF25H FF26H PM6 1 1 − − − FF27H FF28H ADM0 <ADCS> 0 FR2 − − ...

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Table 3-9. Special Function Register List: 78K0/KB2-L (3/5) Address Symbol 7 6 FF4CH to − − − FF4EH FF4FH ISC 0 0 <POWE FF50H ASIM6 <TXE6> <RXE6> R6> FF51H − − − FF52H FF53H ASIS6 0 0 − − ...

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Table 3-9. Special Function Register List: 78K0/KB2-L (4/5) Address Symbol 7 6 FF85H to − − − FF8BH FF8CH TCL51 0 0 FF8DH to − − − FF98H − − FF99H WDTE FF9AH to − − − FF9EH <EXCL ...

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Table 3-9. Special Function Register List: 78K0/KB2-L (5/5) Address Symbol 7 6 FFAFH − − − to FFB9H FFBAH TMC00 0 0 FFBBH PRM00 ES110 ES100 ES010 ES000 CRC00 0 0 FFBCH 0 <OSPT00> <OSPE00> TOC004 FFBDH TOC00 <LVION> ...

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Table 3-10. Special Function Register List: 78K0/KC2-L (1/6) Address Symbol 7 6 FF00H FF01H P1 P17 P16 FF02H P2 P27 P26 Note2 FF03H Note2 FF04H − − − FF05H ...

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Table 3-10. Special Function Register List: 78K0/KC2-L (2/6) Address Symbol 7 6 FF20H PM0 1 1 FF21H PM1 PM17 PM16 Note2 FF22H PM2 PM27 PM26 FF23H PM3 1 1 Note2 FF24H PM4 1 1 FF25H PER0 0 RTCEN ...

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Table 3-10. Special Function Register List: 78K0/KC2-L (3/6) Address Symbol 7 6 Note1 FF40H CKS 0 0 − − FF41H CR51 − − − FF42H FF43H TMC51 <TCE51> TMC516 FF44H to − − − FF47H EGP7 EGP6 FF48H EGPCTL0 ...

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Table 3-10. Special Function Register List: 78K0/KC2-L (4/6) Address Symbol 7 6 <TCE TMC FF6BH TMC50 50> 506 <TMH FF6CH TMHMD1 CKS12 CKS11 CKS10 E1> FF6DH TMCYC1 0 0 KRM5 FF6EH KRM 0 0 <RINT <RCL <RCK FF6FH RTCC2 ...

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Table 3-10. Special Function Register List: 78K0/KC2-L (5/6) Address Symbol 7 6 FF9DH RTCC0 <RTCE> 0 <WALI FF9EH RTCC1 <WALE> E> <EXCL <OSC FF9FH OSCCTL K> SEL> FFA0H RCM <RSTS> 0 FFA1H MCM 0 0 FFA2H MOC 0 ...

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Table 3-10. Special Function Register List: 78K0/KC2-L (6/6) <R> Address Symbol 7 6 FFBAH TMC00 0 0 FFBBH PRM00 ES110 ES100 ES010 FFBCH CRC00 0 0 FFBDH TOC00 0 <OSPT00> <OSPE00> TOC004 FFBEH LVIM <LVION> 0 FFBFH LVIS 0 ...

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Instruction Address Addressing An instruction address is determined by contents of the program counter (PC) and is normally incremented (+1 for each byte) automatically according to the number of bytes of an instruction to be fetched each time ...

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Immediate addressing [Function] Immediate data in the instruction word is transferred to the program counter (PC) and branched. This function is carried out when the CALL !addr16 or BR !addr16 or CALLF !addr11 instruction is executed. CALL !addr16 ...

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Table indirect addressing [Function] Table contents (branch destination address) of the particular location to be addressed by bits the immediate data of an operation code are transferred to the program counter (PC) and branched. ...

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Register addressing [Function] Register pair (AX) contents to be specified with an instruction word are transferred to the program counter (PC) and branched. This function is carried out when the BR AX instruction is executed. [Illustration ...

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Register addressing [Function] The general-purpose register to be specified is accessed as an operand with the register bank select flags (RBS0 to RBS1) and the register specify codes of an operation code. Register addressing is carried out when ...

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Direct addressing [Function] The memory to be manipulated is directly addressed with immediate data in an instruction word becoming an operand address. This addressing can be carried out for all of the memory spaces. [Operand format] [Description example] ...

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Short direct addressing [Function] The memory to be manipulated in the fixed space is directly addressed with 8-bit data in an instruction word. This addressing is applied to the 256-byte space FE20H to FF1FH. Internal high-speed RAM and ...

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Special function register (SFR) addressing [Function] A memory-mapped special function register (SFR) is addressed with 8-bit immediate data in an instruction word. This addressing is applied to the 240-byte spaces FF00H to FFCFH and FFE0H to FFFFH. However, ...

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Register indirect addressing [Function] Register pair contents specified by a register pair specify code in an instruction word and by a register bank select flag (RBS0 and RBS1) serve as an operand address for addressing the memory. This ...

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Based addressing [Function] 8-bit immediate data is added as offset data to the contents of the base register, that is, the HL register pair in the register bank specified by the register bank select flag (RBS0 and RBS1), ...

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Based indexed addressing [Function] The register contents specified in an instruction word are added to the contents of the base register, that is, the HL register pair in the register bank specified by the register ...

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Stack addressing [Function] The stack area is indirectly addressed with the stack pointer (SP) contents. This addressing method is automatically employed when the PUSH, POP, subroutine call and return instructions are executed or the register is saved/reset upon ...

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Port Functions There are two types of pin I/O buffer power supplies: AV and the pins is shown below Note <R> <R> <R> 78K0/Kx2-L microcontrollers are provided with digital I/O ports, which enable variety of control ...

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Function Name I/O P00 I/O Port 0. 2-bit I/O port. P01 Input/output can be specified in 1-bit units. Use of an on-chip pull-up resistor can be specified by a software setting. P20 I/O Port 2. 4-bit I/O port. P21 ...

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Table 4-3. Port Functions (78K0/KA2-L (20-pin products)) Function Name I/O P00 I/O Port 0. 2-bit I/O port. P01 Input/output can be specified in 1-bit units. Use of an on-chip pull-up resistor can be specified by a software setting. P20 ...

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Table 4-4. Port Functions (78K0/KA2-L (25-pin and 32-pin products)) Function Name I/O Note 1 P00 I/O Port 0. 2-bit I/O port. Input/output can be specified in 1-bit units. Note 2 P01 Use of an on-chip pull-up resistor can ...

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Function Name I/O P00 I/O Port 0. 2-bit I/O port. P01 Input/output can be specified in 1-bit units. Use of an on-chip pull-up resistor can be specified by a software setting. P10 I/O Port 1. 8-bit I/O port. P11 ...

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Function Name I/O P00 I/O Port 0. 3-bit I/O port. P01 Input/output can be specified in 1-bit units. Note 1 P02 Use of an on-chip pull-up resistor can be specified by a software setting. P10 I/O Port 1. 8-bit ...

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Function Name I/O P60 I/O Port 6. 4-bit I/O port. Input/output can be specified in 1-bit units. P61 Input of P60 and P61 can be set to SMBus input buffer in P62 1-bit units. Note 2 P63 Output of ...

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Port Configuration Ports include the following hardware. <R> Item Port mode registers (PMxx): Control registers Port registers (Pxx): Pull-up resistor option registers (PUxx): PU0, PU1 Port input mode register 6 (PIM6) Port output mode register 6 (POM6) Reset ...

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Port 0 <R> 78K0/KY2-L μ ( PD78F057x) 16 Pins 20 Pins P00/TI000/ P00/TI000/ INTP0 INTP0 P01/TO00/ P01/TO00/ TI010 TI010 − − Port I/O port with an output latch. Port 0 can be set to the ...

Page 141

WR PU PU0 PU01 Alternate function RD WR PORT P0 Output latch (P01 PM0 PM01 Alternate function P0: Port register 0 PU0: Pull-up resistor option register 0 PM0: Port mode register 0 RD: Read signal WR××: Write ...

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WR PU PU0 PU02 RD Alternate function WR PORT P0 Output latch (P02 PM0 PM02 P0: Port register 0 PU0: Pull-up resistor option register 0 PM0: Port mode register 0 RD: Read signal WR××: Write signal ...

Page 143

Port 1 <R> 78K0/KY2-L μ ( PD78F055x) 16 Pins − − − − − − − − Note Products with operational amplifier only Port I/O port with an output latch. Port 1 can be set ...

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Table 4-9. Setting Functions of P11/ANI9/AMP1OUT Pin ADPC1 Register PM1 Register Digital I/O Input mode selection Output mode Analog I/O Input mode selection Output mode Remark ADPC1: A/D port configuration register 1 PM1: Port mode register 1 OPAMP1E: Bit ...

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Products without operational amplifier of 78K0/KB2-L and 78K0/KC2-L ADPC1 ADPCS8 WR PU Alternate function RD WR PORT Output latch WR PM Alternate function P1: Port register 1 PU1: Pull-up resistor option register 1 PM1: Port mode register ...

Page 146

Products with operational amplifier of 78K0/KB2-L and 78K0/KC2-L ADPC1 ADPCS8 WR PU PU1 PU10 Alternate function RD WR PORT P1 Output latch (P10 PM1 PM10 Alternate function Operational amplifier (-) input P1: Port register 1 ...

Page 147

Products without operational amplifier of 78K0/KB2-L and 78K0/KC2 PORT Output latch WR PM P1: Port register 1 PU1: Pull-up resistor option register 1 PM1: Port mode register 1 ADPC1: A/D port configuration register ...

Page 148

Products with operational amplifier of 78K0/KB2-L and 78K0/KC2-L ADPC1 ADPCS9 WR PU PU1 PU11 Alternate function RD WR PORT P1 Output latch (P11 PM1 PM11 WR AMP1M AMP1M OPAMP1E P1: Port register 1 PU1: Pull-up ...

Page 149

Products without operational amplifier of 78K0/KB2-L and 78K0/KC2-L ADPCS10 PORT Output latch WR PM Alternate function P1: Port register 1 PU1: Pull-up resistor option register 1 PM1: Port mode register 1 ADPC1: A/D ...

Page 150

Products with operational amplifier of 78K0/KB2-L and 78K0/KC2-L ADPC1 ADPCS10 WR PU PU1 PU12 RD WR PORT P1 Output latch (P12 PM1 PM12 Alternate function Operational amplifier (+) input P1: Port register 1 PU1: Pull-up ...

Page 151

WR PU PU13 RD WR PORT Output latch (P13 PM13 Alternate function P1: Port register 1 PU1: Pull-up resistor option register 1 PM1: Port mode register 1 RD: Read signal WR××: Write signal R01UH0028EJ0400 Rev.4.00 Sep 27, ...

Page 152

WR PU PU14 Alternate function RD WR PORT Output latch (P14 PM14 P1: Port register 1 PU1: Pull-up resistor option register 1 PM1: Port mode register 1 RD: Read signal WR××: Write signal R01UH0028EJ0400 Rev.4.00 Sep 27, ...

Page 153

WR PU PU1 PU15 RD WR PORT Output latch (P15 PM1 PM15 Alternate function P1: Port register 1 PU1: Pull-up resistor option register 1 PM1: Port mode register 1 RD: Read signal WR××: Write signal R01UH0028EJ0400 Rev.4.00 ...

Page 154

WR PU PU1 PU16, PU17 Alternate function RD WR PORT P1 Output latch (P16, P17 PM1 PM16, PM17 Alternate function P1: Port register 1 PU1: Pull-up resistor option register 1 PM1: Port mode register 1 RD: Read ...

Page 155

Port 2 <R> 78K0/KY2-L μ ( PD78F055x) 16 Pins 20 Pins P20/ANI0/ P20/ANI0/ Note Note AMP0- AMP0- P21/ANI1/ P21/ANI1/ Note Note AMP0OUT / AMP0OUT / Note Note PGAIN PGAIN P22/ANI2/ P22/ANI2/ Note Note AMP0+ AMP0+ P23/ANI3 P23/ANI3 − ...

Page 156

Table 4-11. Setting Functions of P21/ANI1/AMP0OUT/PGAIN Pin ADPC0 PM2 Register Register Digital I/O Input mode selection Output mode Analog I/O Input mode selection Output mode Table 4-12. Setting Functions of P23/ANI3 to P27/ANI7 Pins ADPC0 Register Digital I/O ...

Page 157

Reset signal generation sets port 2 to analog input. Figures 4-11 to 4-14 show block diagrams of port 2. Caution Make the AV pin the same potential as the V REF (1) Products without operational amplifier RD WR PORT ...

Page 158

Products without operational amplifier RD WR PORT WR PM (2) Products with operational amplifier <R> PORT Output latch AMP0M OPAMP0E P2: Port register 2 PM2: Port mode register 2 RD: Read signal WR××: ...

Page 159

Products without operational amplifier RD WR PORT Output latch WR PM (2) Products with operational amplifier RD WR PORT Output latch (P22 PM2 PM22 P2: Port register 2 PM2: Port mode register 2 RD: Read signal ...

Page 160

RD WR PORT Output latch (P23 to P27 PM23 to PM27 P2: Port register 2 PM2: Port mode register 2 RD: Read signal WR××: Write signal R01UH0028EJ0400 Rev.4.00 Sep 27, 2010 Figure 4-14. Block Diagram of P23-P27 ...

Page 161

Port 3 <R> 78K0/KY2-L μ ( PD78F055x) 16 Pins 20 Pins P30/TOH1/ P30/TOH1/ TI51/INTP1 TI51/INTP1 − P31/INTP2/ TOOLC1 − P32/INTP3/ TOOLD1 − − − − − − − − − − Port I/O port with ...

Page 162

Figure 4-15. Block Diagram of P30 (78K0/KY2-L, 78K0/KA2-L), P33, P34 WR PU PU3 PU30, PU33, PU34 Alternate function RD WR PORT P3 Output latch (P30, P33, P34 PM3 PM30, PM33, PM34 Alternate function P3: Port register 3 ...

Page 163

Figure 4-16. Block Diagram of P30 (78K0/KB2-L, 78K0/KC2-L), P31, P32, P36 WR PU PU3 PU30, PU31, PU32, PU36 Alternate function RD WR PORT P3 Output latch (P30, P31, P32, P36 PM3 PM30, PM31, PM32, PM36 P3: Port ...

Page 164

WR PU PU37 Alternate function RD WR PORT Output latch (P37 PM3 PM37 Alternate function P3: Port register 3 PU3: Pull-up resistor option register 3 PM3: Port mode register 3 RD: Read signal WR××: Write signal R01UH0028EJ0400 ...

Page 165

WR PU PU3 PU35 Alternate function RD WR PORT Output latch (P35 PM3 PM35 Alternate function P3: Port register 3 PU3: Pull-up resistor option register 3 PM3: Port mode register 3 RD: Read signal WR××: Write signal ...

Page 166

Port 4 <R> 78K0/KY2-L 78K0/KA2-L μ μ ( PD78F057x) ( PD78F056x) 16 Pins 20, 25, 32 Pins − − − − − − Remark Functions in parentheses ( ) can be assigned by setting the port alternate switch ...

Page 167

WR PU PU4 PU40 Alternate function RD WR PORT P4 Output latch (P40) Alternate function (RTC) Alternate function (CSI11 PM4 PM40 P4: Port register 4 PU4: Pull-up resistor option register 4 PM4: Port mode register 4 MUXSEL: ...

Page 168

WR PU PU4 PU41 Alternate function RD WR PORT P4 Output latch (P41 PM4 PM41 Alternate function WR PU PU42 Alternate function RD WR PORT Output latch (P42 PM42 Alternate function P4: Port register 4 ...

Page 169

Port 6 78K0/KY2-L 78K0/KA2-L <R> μ μ ( PD78F055x Pins 20, 25, 32 Pins P60/SCLA0/TxD6 P60/SCLA0/TxD6 P61/SDAA0/RxD6 P61/SDAA0/RxD6 − − Port I/O port with an output latch. Port 6 can be set to ...

Page 170

WR PU PU6 PU60 Alternate function RD WR PORT P6 Output latch (P60 PM6 PM60 Alternate function P6: Port register 6 PU6: Pull-up resistor option register 6 PM6: Port mode register 6 PIM6: Port input mode register ...

Page 171

WR PU PU6 PU61 Alternate function RD WR PORT P6 Output latch (P61 PM6 PM61 Alternate function P6: Port register 6 PU6: Pull-up resistor option register 6 PM6: Port mode register 6 PIM6: Port input mode register ...

Page 172

WR PU PU62 Alternate function RD WR PORT Output latch (P62 PM62 Alternate function P6: Port register 6 PU6: Pull-up resistor option register 6 PM6: Port mode register 6 POM6: Port output mode register 6 RD: Read ...

Page 173

PORT Output latch WR PM P6: Port register 6 PU6: Pull-up resistor option register 6 PM6: Port mode register 6 POM6: Port output mode register 6 RD: Read signal WR××: Write signal R01UH0028EJ0400 Rev.4.00 Sep ...

Page 174

Port 7 <R> 78K0/KY2-L μ ( PD78F057x) 16 Pins 20, 25 Pins − − − − − − − − − − − − Port I/O port with an output latch. Port 7 can be ...

Page 175

PORT WR PM <R> (2) 78K0/KA2-L (32-pin products PORT WR PM PM70 to PM72 P7: Port register 7 PU7: Pull-up resistor option register 7 PM7: Port mode register 7 RD: Read ...

Page 176

Port 12 <R> 78K0/KY2-L μ ( PD78F055x) 16 Pins 20 Pins − − P121/X1/ P121/X1/ TOOLC0 TOOLC0 P122/X2/ P122/X2/ EXCLK/ EXCLK/ TOOLD0 TOOLD0 − − − − P125/RESET P125/RESET Remark Functions in parentheses ( ) can be assigned ...

Page 177

Cautions 1. When using the P121 to P124 pins to connect a resonator for the main system clock (X1, X2) or subsystem clock (XT1, XT2 input an external clock for the main system clock (EXCLK) or subsystem ...

Page 178

WR PU PU12 PU120 Alternate function RD WR PORT P12 Output latch (P120) Alternate function WR PM MUXSEL PM12 PM120 P12: Port register 12 PU12: Pull-up resistor option register 12 PM12: Port mode register 12 MUXSEL: Port ...

Page 179

RD RD OSCCTL: Clock operation mode select register RD: Read signal WR××: Write signal R01UH0028EJ0400 Rev.4.00 Sep 27, 2010 Figure 4-28. Block Diagram of P121 to P124 OSCCTL OSCSEL/ OSCSELS OSCCTL EXCLK, OSCSEL/ EXCLKS, OSCSELS CHAPTER 4 PORT FUNCTIONS ...

Page 180

Internal reset WR PM PU12: Pull-up resistor option register 12 RD: Read signal WR××: Write signal RSTMASK: Reset pin mode register <R> Caution Because RESET/P125 is set in the external reset input immediately after release of ...

Page 181

Registers Controlling Port Function Port functions are controlled by the following eight types of registers. • Port mode registers (PMxx) • Port registers (Pxx) • Pull-up resistor option registers (PUxx) • Port input mode register 6 (PIM6) • ...

Page 182

Figure 4-31. Format of Port Mode Register (78K0/KA2-L (20-pin products)) Symbol PM0 Note PM2 1 1 PM25 PM3 PM6 PMmn 0 Output mode (output buffer on) 1 ...

Page 183

Figure 4-32. Format of Port Mode Register (78K0/KA2-L (25-pin and 32-pin products) Symbol 7 6 PM0 1 1 Notes 2, 3 Note 3 PM2 PM27 PM26 PM25 PM3 PM37 PM36 PM6 1 1 Note 2 PM7 1 1 ...

Page 184

Figure 4-33. Format of Port Mode Register (78K0/KB2-L) Symbol PM0 PM1 PM17 PM16 PM15 PM2 PM3 PM6 PM12 PMmn 0 Output ...

Page 185

Symbol 7 6 PM0 1 1 PM1 PM17 PM16 Note 2, 3 Note 2 PM2 PM27 PM26 PM25 PM3 1 1 Note 3 PM4 PM6 PM7 1 1 PM75 PM12 1 1 PMmn 0 ...

Page 186

Port registers (Pxx) These registers write the data that is output from the chip when data is output from a port. If the data is read in the input mode, the pin level is read ...

Page 187

Figure 4-36. Format of Port Register (78K0/KA2-L (20-pin products)) Symbol Note P25 P12 0 0 P125 Pmn Output data control ...

Page 188

Figure 4-37. Format of Port Register (78K0/KA2-L (25-pin and 32-pin products)) <R> Symbol Note 2, 3 Note 3 P2 P27 P26 P25 P3 P37 P36 P35 Note ...

Page 189

Figure 4-38. Format of Port Register (78K0/KB2-L) Symbol P17 P16 P15 P12 0 0 P125 Pmn Output data control ...

Page 190

Symbol P17 P16 Note 2, 3 Note 2 P2 P27 P26 P25 Note P75 P12 0 0 P125 Pmn ...

Page 191

Pull-up resistor option registers (PUxx) These registers specify whether the on-chip pull-up resistors are to be used or not. On-chip pull-up resistors can be used in 1-bit units only for the bits set to input mode of the ...

Page 192

Figure 4-42. Format of Pull-up Resistor Option Register (78K0/KA2-L (25-pin and 32-pin products)) Symbol PU0 PU3 PU37 PU36 PU35 PU6 PU12 0 0 PU125 PUmn 0 On-chip pull-up resistor not ...

Page 193

Figure 4-44. Format of Pull-up Resistor Option Register (78K0/KC2-L) <R> Symbol 7 6 PU0 0 0 PU1 PU17 PU16 PU3 0 0 Note 2 PU4 0 0 PU6 0 0 PU7 0 0 PU75 PU12 0 0 PUmn 0 ...

Page 194

Port output mode register 6 (POM6) This register sets the output mode of P60 to P63 in 1-bit units. 2 During I C communication, set POM60 and POM61 the 78K0/KY2-L and 78K0/KA2-L, clear POM60 to ...

Page 195

A/D port configuration registers 0, 1 ADPC0 switches the P20/AMP0-/ANI0 to P27/ANI7 pins to digital I/O or analog I/O of port. Each bit of ADPC0 corresponds to a pin of port 2 and can be specified in 1-bit ...

Page 196

Figure 4-48. Format of A/D Port Configuration Register 0, 1 (ADPC0, ADPC1) (2/2) (e) 78K0/KB2-L Address: FF2EH After reset: 00H Symbol 7 ADPC0 0 Address: FF2FH After reset: 07H Symbol 7 ADPC1 0 (f) 78K0/KC2-L (40-pin products) Address: FF2EH ...

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Port alternate switch control register (MUXSEL) MUXSEL of 78K0/KA2-L (25-pin products) assigns TOH1, TI51, TI000, and INTP0 pins. By default, INTP0 and TI000 are assigned to P00, while TI51 and TOH1 have no assignment setting. MUXSEL of 78K0/KA2-L ...

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Figure 4-49. Format of Port Alternate Switch Control Register (MUXSEL) (2/2) (2) 78K0/KA2-L (32-pin products) Address: FF39H After reset: 00H Symbol 7 MUXSEL INTP0SEL1 INTP0SEL0 TM00SEL1 TM00SEL0 INTP0SEL1 INTP0SEL0 TM00SEL1 TM00SEL0 ...

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Port Function Operations Port operations differ depending on whether the input or output mode is set, as shown below. 4.4.1 Writing to I/O port (1) Output mode A value is written to the output latch by a transfer ...

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Settings of Port Mode Register and Output Latch When Using Alternate Function To use the alternate function of a port pin, set the port mode register and output latch as shown in Tables 4-14 to 4-18. Table 4-14. ...

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