PIC18F4539T-E/ML Microchip Technology, PIC18F4539T-E/ML Datasheet - Page 186

IC PIC MCU FLASH 12KX16 44QFN

PIC18F4539T-E/ML

Manufacturer Part Number
PIC18F4539T-E/ML
Description
IC PIC MCU FLASH 12KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4539T-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1408 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1408 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18FXX39
The value that is in the ADRESH/ADRESL registers is
not modified for a Power-on Reset. The ADRESH/
ADRESL registers will contain unknown data after a
Power-on Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 18.1.
After this acquisition time has elapsed, the A/D conver-
sion can be started. The following steps should be
followed for doing an A/D conversion:
1.
2.
3.
4.
FIGURE 18-2:
DS30485A-page 184
Configure the A/D module:
• Configure analog pins, voltage reference and
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
• Set PEIE bit
Wait the required acquisition time.
Start conversion:
• Set GO/DONE bit (ADCON0)
digital I/O (ADCON1)
Legend: C
V
AIN
Rs
V
I
R
SS
C
LEAKAGE
T
PIN
IC
HOLD
ANx
ANALOG INPUT MODEL
C
5 pF
PIN
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
V
DD
V
V
T
T
= 0.6V
= 0.6V
Preliminary
I
± 500 nA
LEAKAGE
5.
6.
7.
18.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 18-2. The
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
at the analog input (due to pin leakage current). The
maximum recommended impedance for analog
sources is 2.5 kΩ. After the analog input channel is
selected (changed), this acquisition must be done
before the conversion can be started.
R
IC
DD
Note:
≤ 1k
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
Read A/D Result registers (ADRESH/ADRESL);
clear bit ADIF if required.
For next conversion, go to step 1 or step 2 as
required. The A/D conversion time per bit is
defined as T
required before the next acquisition starts.
). The source impedance affects the offset voltage
(interrupts disabled)
A/D Acquisition Requirements
SS
V
SS
When the conversion is started, the hold-
ing capacitor is disconnected from the
input pin.
DD
SS
) impedance varies over the device voltage
Sampling
Switch
) impedance directly affect the time
6V
5V
4V
3V
2V
R
SS
AD
. A minimum wait of 2 T
S
Sampling Switch
5 6 7 8 9 10 11
 2002 Microchip Technology Inc.
) and the internal sampling
V
SS
C
HOLD
HOLD
= 120 pF
HOLD
) must be allowed
(kΩ)
. The sampling
AD
is

Related parts for PIC18F4539T-E/ML